Michael (XIAO Xufeng) 647dea9395 soc: combine xxx_caps.h into one soc_caps.h ... During HAL layer refactoring and new chip bringup, we have several caps.h for each part, to reduce the conflicts to minimum. But this is The capabilities headers will be relataive stable once completely written (maybe after the featues are supported by drivers). Now ESP32 and ESP32-S2 drivers are relative stable, making it a good time to combine all these caps.h into one soc_caps.h This cleanup also move HAL config and pin config into separated files, to make the responsibilities of these headers more clear. This is helpful for the stabilities of soc_caps.h because we want to make it public some day.		2020-10-17 16:10:15 +08:00
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esp32/rom	soc: combine xxx_caps.h into one soc_caps.h	2020-10-17 16:10:15 +08:00
esp32s2/rom	bootloader: fix the WRSR format for ISSI flash chips	2020-09-19 10:51:51 +08:00
esp32s3/rom	bringup esp32-s3 on FPGA	2020-09-22 15:15:03 +08:00
esp_rom_crc.h	esp_rom: extract common CRC apis into esp_rom_crc.h	2020-06-23 16:40:14 +08:00
esp_rom_efuse.h	esp_rom: extract common efuse apis into esp_rom_efuse.h	2020-07-15 10:40:50 +08:00
esp_rom_gpio.h	soc: combine xxx_caps.h into one soc_caps.h	2020-10-17 16:10:15 +08:00
esp_rom_md5.h	esp_rom: extract common MD5 hash apis into esp_rom_md5.h	2020-07-21 17:01:28 +08:00
esp_rom_sys.h	esp32: move disabling rom log to esp_rom	2020-08-17 19:08:56 +08:00
esp_rom_uart.h	esp_rom: extract common ets apis into esp_rom_sys.h	2020-07-27 15:27:01 +08:00