Michael (XIAO Xufeng) 2bffeb7265 uart: fix misleading files for UART2 ... Includes: header files, ld files and clk.c ESP32-C3 only have UART0 and UART1.		2021-04-29 14:23:13 +08:00
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aes.h	esp_rom: Add initial ESP32-C3 support	2020-11-30 11:12:56 +11:00
apb_backup_dma.h	esp_wifi: fix esp32c3 code issues	2021-01-10 16:16:28 +08:00
bigint.h	esp_rom: Add initial ESP32-C3 support	2020-11-30 11:12:56 +11:00
cache.h	esp_rom: Add initial ESP32-C3 support	2020-11-30 11:12:56 +11:00
crc.h	esp_rom: Add initial ESP32-C3 support	2020-11-30 11:12:56 +11:00
digital_signature.h	esp_rom: Add initial ESP32-C3 support	2020-11-30 11:12:56 +11:00
efuse.h	efuse: Updates description of uart_print_control efuse	2021-02-08 18:02:55 +08:00
esp_flash.h	esp_rom: Add initial ESP32-C3 support	2020-11-30 11:12:56 +11:00
ets_sys.h	uart: fix misleading files for UART2	2021-04-29 14:23:13 +08:00
gpio.h	esp_rom: Add initial ESP32-C3 support	2020-11-30 11:12:56 +11:00
hmac.h	esp_rom: Add initial ESP32-C3 support	2020-11-30 11:12:56 +11:00
libc_stubs.h	esp_rom: Add initial ESP32-C3 support	2020-11-30 11:12:56 +11:00
lldesc.h	esp_rom: Add initial ESP32-C3 support	2020-11-30 11:12:56 +11:00
md5_hash.h	esp_rom: Add initial ESP32-C3 support	2020-11-30 11:12:56 +11:00
miniz.h	esp_rom: Add initial ESP32-C3 support	2020-11-30 11:12:56 +11:00
newlib.h	esp_rom: Add initial ESP32-C3 support	2020-11-30 11:12:56 +11:00
rom_layout.h	esp_rom: Add initial ESP32-C3 support	2020-11-30 11:12:56 +11:00
rsa_pss.h	bootloader/esp32c3: Adds secure boot (not yet supported)	2021-01-19 20:51:13 +08:00
rtc.h	esp_rom: Add initial ESP32-C3 support	2020-11-30 11:12:56 +11:00
secure_boot.h	secure_boot: Secure Boot V2 verify app signature on update (without Secure boot)	2021-03-17 17:08:59 +08:00
sha.h	esp_rom: Add initial ESP32-C3 support	2020-11-30 11:12:56 +11:00
spi_flash.h	esp_rom: Add initial ESP32-C3 support	2020-11-30 11:12:56 +11:00
tjpgd.h	esp_rom: Add initial ESP32-C3 support	2020-11-30 11:12:56 +11:00
uart.h	uart: fix misleading files for UART2	2021-04-29 14:23:13 +08:00