esp-idf/components/soc
Ivan Grokhotkov 1e7c3854d3 Merge branch 'bugfix/warn_on_invalid_xtal_freq' into 'master'
soc/rtc: warn if detected XTAL frequency does not match configured one

See merge request !1242
2017-09-11 18:15:11 +08:00
..
esp32 Merge branch 'bugfix/warn_on_invalid_xtal_freq' into 'master' 2017-09-11 18:15:11 +08:00
include/soc Heap tracing support 2017-09-07 16:32:05 +10:00
test soc: add source code of rtc_clk, rtc_pm 2017-04-11 15:45:54 +08:00
component.mk Add initial SPI RAM support. This adds support for an ESP-PSRAM32 chip connected to the default flash pins and GPIO 16 and 17. The RAM is mapped to address 0x3F800000, but otherwise ignored by esp-idf as of yet. 2017-09-04 12:05:49 +08:00