/* * SPDX-FileCopyrightText: 2023-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ #pragma once #include #include #include "esp_assert.h" #include "soc/soc.h" #include "soc/lp_system_reg.h" #include "soc/reset_reasons.h" #ifdef __cplusplus extern "C" { #endif /** \defgroup rtc_apis, rtc registers and memory related apis * @brief rtc apis */ /** @addtogroup rtc_apis * @{ */ /************************************************************************************** * Note: * * Some Rtc memory and registers are used, in ROM or in internal library. * * Please do not use reserved or used rtc memory or registers. * * * ************************************************************************************* * LP Memory & Store Register usage ************************************************************************************* * rtc memory addr type size usage * 0x3f421000(0x50000000) Slow SIZE_CP Co-Processor code/Reset Entry * 0x3f421000+SIZE_CP Slow 8192-SIZE_CP * * 0x3ff80000(0x40070000) Fast 8192 deep sleep entry code * ************************************************************************************* * RTC store registers usage * RTC_CNTL_STORE0_REG Reserved * RTC_CNTL_STORE1_REG RTC_SLOW_CLK calibration value * RTC_CNTL_STORE2_REG Boot time, low word * RTC_CNTL_STORE3_REG Boot time, high word * RTC_CNTL_STORE4_REG External XTAL frequency * RTC_CNTL_STORE5_REG APB bus frequency * RTC_CNTL_STORE6_REG FAST_RTC_MEMORY_ENTRY * RTC_CNTL_STORE7_REG FAST_RTC_MEMORY_CRC ************************************************************************************* */ #define RTC_SLOW_CLK_CAL_REG LP_SYSTEM_REG_LP_STORE1_REG #define RTC_BOOT_TIME_LOW_REG LP_SYSTEM_REG_LP_STORE2_REG #define RTC_BOOT_TIME_HIGH_REG LP_SYSTEM_REG_LP_STORE3_REG #define RTC_XTAL_FREQ_REG LP_SYSTEM_REG_LP_STORE4_REG #define RTC_APB_FREQ_REG LP_SYSTEM_REG_LP_STORE5_REG #define RTC_ENTRY_ADDR_REG LP_SYSTEM_REG_LP_STORE6_REG #define RTC_RESET_CAUSE_REG LP_SYSTEM_REG_LP_STORE6_REG #define RTC_MEMORY_CRC_REG LP_SYSTEM_REG_LP_STORE7_REG #define RTC_DISABLE_ROM_LOG ((1 << 0) | (1 << 16)) //!< Disable logging from the ROM code. /* * Use LP_SYS_LP_STORE8_REG to store light sleep wake stub addr and sleep mode * * bit[31: 2] Wake restore func addr * bit[0]: * 0 -- light sleep * 1 -- deep sleep */ #define RTC_SLEEP_WAKE_STUB_ADDR_REG LP_SYSTEM_REG_LP_STORE8_REG #define RTC_SLEEP_MODE_REG LP_SYSTEM_REG_LP_STORE8_REG typedef enum { AWAKE = 0, //