/* * SPDX-FileCopyrightText: 2021 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ /** * I2S test environment UT_T1_I2S: * We use internal signals instead of external wiring, but please keep the following IO connections, or connect nothing to prevent the signal from being disturbed. * connect GPIO15 and GPIO19, GPIO25(ESP32)/GPIO17(ESP32-S2) and GPIO26, GPIO21 and GPIO22(ESP32)/GPIO20(ESP32-S2) * Please do not connect GPIO32(ESP32) any pull-up resistors externally, it will be used to test i2s adc function. */ #include #include #include "freertos/FreeRTOS.h" #include "freertos/task.h" #include "driver/i2s.h" #include "driver/gpio.h" #include "hal/gpio_hal.h" #include "unity.h" #include "math.h" #include "esp_rom_gpio.h" #define SAMPLE_RATE (36000) #define SAMPLE_BITS (16) #if CONFIG_IDF_TARGET_ESP32 #define MASTER_BCK_IO 15 #define MASTER_WS_IO 25 #define SLAVE_BCK_IO 19 #define SLAVE_WS_IO 26 #define DATA_IN_IO 21 #define DATA_OUT_IO 22 #define ADC1_CHANNEL_4_IO 32 #define I2S0_DATA_OUT_IDX I2S0O_DATA_OUT23_IDX #define I2S0_DATA_IN_IDX I2S0I_DATA_IN15_IDX #define I2S1_DATA_OUT_IDX I2S1O_DATA_OUT23_IDX #define I2S1_DATA_IN_IDX I2S1I_DATA_IN15_IDX #elif CONFIG_IDF_TARGET_ESP32S2 #define MASTER_BCK_IO 15 #define MASTER_WS_IO 28 #define SLAVE_BCK_IO 19 #define SLAVE_WS_IO 26 #define DATA_IN_IO 21 #define DATA_OUT_IO 20 #define I2S0_DATA_OUT_IDX I2S0O_DATA_OUT23_IDX #define I2S0_DATA_IN_IDX I2S0I_DATA_IN15_IDX #elif CONFIG_IDF_TARGET_ESP32C3 // TODO: change pins #define MASTER_BCK_IO 4 #define MASTER_WS_IO 5 #define SLAVE_BCK_IO 14 #define SLAVE_WS_IO 15 #define DATA_IN_IO 19 #define DATA_OUT_IO 18 #define I2S0_DATA_OUT_IDX I2SO_SD_OUT_IDX #define I2S0_DATA_IN_IDX I2SI_SD_IN_IDX #elif CONFIG_IDF_TARGET_ESP32S3 #define MASTER_BCK_IO 4 #define MASTER_WS_IO 5 #define SLAVE_BCK_IO 14 #define SLAVE_WS_IO 15 #define DATA_IN_IO 19 #define DATA_OUT_IO 18 #define I2S0_DATA_OUT_IDX I2S0O_SD_OUT_IDX #define I2S0_DATA_IN_IDX I2S0I_SD_IN_IDX #define I2S1_DATA_OUT_IDX I2S1O_SD_OUT_IDX #define I2S1_DATA_IN_IDX I2S1I_SD_IN_IDX #endif #define PERCENT_DIFF 0.0001 #define I2S_TEST_MODE_SLAVE_TO_MAXTER 0 #define I2S_TEST_MODE_MASTER_TO_SLAVE 1 #define I2S_TEST_MODE_LOOPBACK 2 // mode: 0, master rx, slave tx. mode: 1, master tx, slave rx. mode: 2, master tx rx loopback // Since ESP32-S2 has only one I2S, only loop back test can be tested. static void i2s_test_io_config(int mode) { // Connect internal signals using IO matrix. gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[MASTER_BCK_IO], PIN_FUNC_GPIO); gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[MASTER_WS_IO], PIN_FUNC_GPIO); gpio_hal_iomux_func_sel(GPIO_PIN_MUX_REG[DATA_OUT_IO], PIN_FUNC_GPIO); gpio_set_direction(MASTER_BCK_IO, GPIO_MODE_INPUT_OUTPUT); gpio_set_direction(MASTER_WS_IO, GPIO_MODE_INPUT_OUTPUT); gpio_set_direction(DATA_OUT_IO, GPIO_MODE_INPUT_OUTPUT); switch (mode) { #if SOC_I2S_NUM > 1 case I2S_TEST_MODE_SLAVE_TO_MAXTER: { esp_rom_gpio_connect_out_signal(MASTER_BCK_IO, I2S0I_BCK_OUT_IDX, 0, 0); esp_rom_gpio_connect_in_signal(MASTER_BCK_IO, I2S1O_BCK_IN_IDX, 0); esp_rom_gpio_connect_out_signal(MASTER_WS_IO, I2S0I_WS_OUT_IDX, 0, 0); esp_rom_gpio_connect_in_signal(MASTER_WS_IO, I2S1O_WS_IN_IDX, 0); esp_rom_gpio_connect_out_signal(DATA_OUT_IO, I2S1_DATA_OUT_IDX, 0, 0); esp_rom_gpio_connect_in_signal(DATA_OUT_IO, I2S0_DATA_IN_IDX, 0); } break; case I2S_TEST_MODE_MASTER_TO_SLAVE: { esp_rom_gpio_connect_out_signal(MASTER_BCK_IO, I2S0O_BCK_OUT_IDX, 0, 0); esp_rom_gpio_connect_in_signal(MASTER_BCK_IO, I2S1I_BCK_IN_IDX, 0); esp_rom_gpio_connect_out_signal(MASTER_WS_IO, I2S0O_WS_OUT_IDX, 0, 0); esp_rom_gpio_connect_in_signal(MASTER_WS_IO, I2S1I_WS_IN_IDX, 0); esp_rom_gpio_connect_out_signal(DATA_OUT_IO, I2S0_DATA_OUT_IDX, 0, 0); esp_rom_gpio_connect_in_signal(DATA_OUT_IO, I2S1_DATA_IN_IDX, 0); } break; #endif case I2S_TEST_MODE_LOOPBACK: { esp_rom_gpio_connect_out_signal(DATA_OUT_IO, I2S0_DATA_OUT_IDX, 0, 0); esp_rom_gpio_connect_in_signal(DATA_OUT_IO, I2S0_DATA_IN_IDX, 0); } break; default: { TEST_FAIL_MESSAGE("error: mode not supported"); } break; } } /** * i2s initialize test * 1. i2s_driver_install * 2. i2s_set_pin */ TEST_CASE("I2S basic driver install, uninstall, set pin test", "[i2s]") { // dac, adc i2s i2s_config_t i2s_config = { .mode = I2S_MODE_MASTER | I2S_MODE_TX, .sample_rate = SAMPLE_RATE, .bits_per_sample = SAMPLE_BITS, .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, .communication_format = I2S_COMM_FORMAT_STAND_I2S, .dma_buf_count = 6, .dma_buf_len = 60, .use_apll = 0, .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 , }; // normal i2s i2s_pin_config_t pin_config = { .bck_io_num = MASTER_BCK_IO, .ws_io_num = MASTER_WS_IO, .data_out_num = DATA_OUT_IO, .data_in_num = -1 }; TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL)); TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &pin_config)); TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0)); //error param test TEST_ASSERT(i2s_driver_install(I2S_NUM_MAX, &i2s_config, 0, NULL) == ESP_ERR_INVALID_ARG); TEST_ASSERT(i2s_driver_install(I2S_NUM_0, NULL, 0, NULL) == ESP_ERR_INVALID_ARG); i2s_config.dma_buf_count = 1; TEST_ASSERT(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL) == ESP_ERR_INVALID_ARG); i2s_config.dma_buf_count = 129; TEST_ASSERT(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL) == ESP_ERR_INVALID_ARG); TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0)); } TEST_CASE("I2S Loopback test(master tx and rx)", "[i2s]") { // master driver installed and send data i2s_config_t master_i2s_config = { .mode = I2S_MODE_MASTER | I2S_MODE_TX | I2S_MODE_RX, .sample_rate = SAMPLE_RATE, .bits_per_sample = SAMPLE_BITS, .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, .communication_format = I2S_COMM_FORMAT_STAND_I2S, .dma_buf_count = 6, .dma_buf_len = 100, .use_apll = 0, .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 , }; i2s_pin_config_t master_pin_config = { .bck_io_num = MASTER_BCK_IO, .ws_io_num = MASTER_WS_IO, .data_out_num = DATA_OUT_IO, .data_in_num = DATA_IN_IO }; TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &master_i2s_config, 0, NULL)); TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, &master_pin_config)); i2s_test_io_config(I2S_TEST_MODE_LOOPBACK); printf("\r\nheap size: %d\n", esp_get_free_heap_size()); uint8_t* data_wr = (uint8_t*)malloc(sizeof(uint8_t)*400); size_t i2s_bytes_write = 0; size_t bytes_read = 0; int length = 0; uint8_t *i2s_read_buff = (uint8_t*)malloc(sizeof(uint8_t)*10000); for(int i=0; i<100; i++) { data_wr[i] = i+1; } int flag=0; // break loop flag int end_position = 0; // write data to slave i2s_write(I2S_NUM_0, data_wr, sizeof(uint8_t)*400, &i2s_bytes_write, 1000 / portTICK_PERIOD_MS); while(!flag){ if (length >= 10000 - 500) { break; } i2s_read(I2S_NUM_0, i2s_read_buff + length, sizeof(uint8_t)*500, &bytes_read, 1000/portMAX_DELAY); if(bytes_read>0) { printf("read data size: %d\n", bytes_read); for(int i=length; i0) { printf("read data size: %d\n", bytes_read); for(int i=length; i 0) { for(int i=length; i 100) { i2s_adc_disable(I2S_NUM_0); free(i2sReadBuffer); i2s_driver_uninstall(I2S_NUM_0); TEST_ASSERT_LESS_THAN(100, adcAvgValue); } } else { if (adcAvgValue < 4000) { i2s_adc_disable(I2S_NUM_0); free(i2sReadBuffer); i2s_driver_uninstall(I2S_NUM_0); TEST_ASSERT_GREATER_THAN(4000, adcAvgValue); } } } } i2s_adc_disable(I2S_NUM_0); free(i2sReadBuffer); i2s_driver_uninstall(I2S_NUM_0); } TEST_CASE("I2S dac test", "[i2s]") { // dac, adc i2s i2s_config_t i2s_config = { .mode = I2S_MODE_MASTER | I2S_MODE_TX, .sample_rate = SAMPLE_RATE, .bits_per_sample = SAMPLE_BITS, .channel_format = I2S_CHANNEL_FMT_RIGHT_LEFT, .communication_format = I2S_COMM_FORMAT_STAND_I2S, .dma_buf_count = 6, .dma_buf_len = 60, .use_apll = 0, .intr_alloc_flags = ESP_INTR_FLAG_LEVEL1 , }; //install and start i2s driver TEST_ESP_OK(i2s_driver_install(I2S_NUM_0, &i2s_config, 0, NULL)); //for internal DAC, this will enable both of the internal channels TEST_ESP_OK(i2s_set_pin(I2S_NUM_0, NULL)); //stop & destroy i2s driver TEST_ESP_OK(i2s_driver_uninstall(I2S_NUM_0)); } #endif