/* FreeRTOS V8.2.3 - Copyright (C) 2015 Real Time Engineers Ltd. All rights reserved VISIT http://www.FreeRTOS.org TO ENSURE YOU ARE USING THE LATEST VERSION. This file is part of the FreeRTOS distribution and was contributed to the project by Technolution B.V. (www.technolution.nl, freertos-riscv@technolution.eu) under the terms of the FreeRTOS contributors license. FreeRTOS is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License (version 2) as published by the Free Software Foundation >>>> AND MODIFIED BY <<<< the FreeRTOS exception. *************************************************************************** >>! NOTE: The modification to the GPL is included to allow you to !<< >>! distribute a combined work that includes FreeRTOS without being !<< >>! obliged to provide the source code for proprietary components !<< >>! outside of the FreeRTOS kernel. !<< *************************************************************************** FreeRTOS is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. Full license text is available on the following link: http://www.freertos.org/a00114.html *************************************************************************** * * * FreeRTOS provides completely free yet professionally developed, * * robust, strictly quality controlled, supported, and cross * * platform software that is more than just the market leader, it * * is the industry's de facto standard. * * * * Help yourself get started quickly while simultaneously helping * * to support the FreeRTOS project by purchasing a FreeRTOS * * tutorial book, reference manual, or both: * * http://www.FreeRTOS.org/Documentation * * * *************************************************************************** http://www.FreeRTOS.org/FAQHelp.html - Having a problem? Start by reading the FAQ page "My application does not run, what could be wrong?". Have you defined configASSERT()? http://www.FreeRTOS.org/support - In return for receiving this top quality embedded software for free we request you assist our global community by participating in the support forum. http://www.FreeRTOS.org/training - Investing in training allows your team to be as productive as possible as early as possible. Now you can receive FreeRTOS training directly from Richard Barry, CEO of Real Time Engineers Ltd, and the world's leading authority on the world's leading RTOS. http://www.FreeRTOS.org/plus - A selection of FreeRTOS ecosystem products, including FreeRTOS+Trace - an indispensable productivity tool, a DOS compatible FAT file system, and our tiny thread aware UDP/IP stack. http://www.FreeRTOS.org/labs - Where new FreeRTOS products go to incubate. Come and try FreeRTOS+TCP, our new open source TCP/IP stack for FreeRTOS. http://www.OpenRTOS.com - Real Time Engineers ltd. license FreeRTOS to High Integrity Systems ltd. to sell under the OpenRTOS brand. Low cost OpenRTOS licenses offer ticketed support, indemnification and commercial middleware. http://www.SafeRTOS.com - High Integrity Systems also provide a safety engineered and independently SIL3 certified version for use in safety and mission critical applications that require provable dependability. 1 tab == 4 spaces! */ /*----------------------------------------------------------------------- * Implementation of functions defined in portable.h for the RISC-V port. *----------------------------------------------------------------------*/ #include #include "FreeRTOS.h" #include "task.h" #include "sdkconfig.h" #include "portmacro.h" #include "riscv/interrupt.h" #include "riscv/rvruntime-frames.h" #include "soc/periph_defs.h" #include "soc/system_reg.h" #include "soc/interrupt_reg.h" #include "hal/systimer_hal.h" #include "hal/systimer_ll.h" #include "riscv/riscv_interrupts.h" #include "riscv/interrupt.h" #include "esp_system.h" #include "esp_intr_alloc.h" #include "esp_log.h" /** * @brief A variable is used to keep track of the critical section nesting. * @note This variable has to be stored as part of the task context and must be initialized to a non zero value * to ensure interrupts don't inadvertently become unmasked before the scheduler starts. * As it is stored as part of the task context it will automatically be set to 0 when the first task is started. */ static UBaseType_t uxCriticalNesting = 0; static UBaseType_t uxSavedInterruptState = 0; BaseType_t uxSchedulerRunning = 0; UBaseType_t uxInterruptNesting = 0; __attribute__((aligned(16))) static StackType_t xIsrStack[configISR_STACK_SIZE]; StackType_t *xIsrStackTop = &xIsrStack[0] + (configISR_STACK_SIZE & (~((portPOINTER_SIZE_TYPE)portBYTE_ALIGNMENT_MASK))); static const char *TAG = "cpu_start"; // [refactor-todo]: might be appropriate to change in the future, but static void vPortSysTickHandler(void); static void vPortSetupTimer(void); static void vPortSetupSoftwareInterrupt(void); static void vPortSoftwareInterrupt(void); static void prvTaskExitError(void); extern void esprv_intc_int_set_threshold(int); // FIXME, this function is in ROM only void vPortEnterCritical(void) { BaseType_t state = portENTER_CRITICAL_NESTED(); uxCriticalNesting++; if (uxCriticalNesting == 1) { //portDISABLE_INTERRUPTS(); uxSavedInterruptState = state; } } void vPortExitCritical(void) { if (uxCriticalNesting > 0) { uxCriticalNesting--; if (uxCriticalNesting == 0) { portEXIT_CRITICAL_NESTED(uxSavedInterruptState); //portENABLE_INTERRUPTS(); } } } /** * @brief Set up the systimer peripheral to generate the tick interrupt * */ void vPortSetupTimer(void) { /* register the interrupt handler */ intr_handler_set(ETS_SYSTICK_INUM, (intr_handler_t)&vPortSysTickHandler, NULL); /* pass the timer interrupt through the interrupt matrix */ intr_matrix_route(ETS_SYSTIMER_TARGET0_EDGE_INTR_SOURCE, ETS_SYSTICK_INUM); /* enable the interrupt in the INTC */ esprv_intc_int_enable(BIT(ETS_SYSTICK_INUM)); esprv_intc_int_set_type(BIT(ETS_SYSTICK_INUM), INTR_TYPE_LEVEL); esprv_intc_int_set_priority(ETS_SYSTICK_INUM, 1); /* configure the timer */ systimer_hal_init(); systimer_hal_enable_counter(SYSTIMER_COUNTER_1); systimer_hal_set_alarm_period(SYSTIMER_ALARM_0, 1000000UL / CONFIG_FREERTOS_HZ); systimer_hal_select_alarm_mode(SYSTIMER_ALARM_0, SYSTIMER_ALARM_MODE_PERIOD); systimer_hal_enable_alarm_int(SYSTIMER_ALARM_0); systimer_hal_connect_alarm_counter(SYSTIMER_ALARM_0, SYSTIMER_COUNTER_1); } /* setup software interrupt */ void vPortSetupSoftwareInterrupt(void) { /* register the interrupt handler, see interrupt.h */ intr_handler_set(ETS_CPU_INTR0_INUM, (intr_handler_t)&vPortSoftwareInterrupt, NULL); /* pass the "FROM_CPU_0", a.k.a. cross-core interrupt, through the interrupt matrix */ intr_matrix_route(ETS_FROM_CPU_INTR0_SOURCE, ETS_CPU_INTR0_INUM); /* enable the interrupt in the INTC */ esprv_intc_int_enable(BIT(ETS_CPU_INTR0_INUM)); esprv_intc_int_set_type(BIT(ETS_CPU_INTR0_INUM), INTR_TYPE_LEVEL); esprv_intc_int_set_priority(ETS_CPU_INTR0_INUM, 1); // TODO ESP32-C3 IDF-2126, maybe can use interrupt allocation API for all of the above? unsure... esp_intr_reserve(ETS_CPU_INTR0_INUM, xPortGetCoreID()); } void prvTaskExitError(void) { /* A function that implements a task must not exit or attempt to return to its caller as there is nothing to return to. If a task wants to exit it should instead call vTaskDelete( NULL ). Artificially force an assert() to be triggered if configASSERT() is defined, then stop here so application writers can catch the error. */ configASSERT(uxCriticalNesting == ~0UL); portDISABLE_INTERRUPTS(); for (;;) ; } /* Clear current interrupt mask and set given mask */ void vPortClearInterruptMask(int mask) { REG_WRITE(INTERRUPT_CORE0_CPU_INT_THRESH_REG, mask); } /* Set interrupt mask and return current interrupt enable register */ int vPortSetInterruptMask(void) { int ret; unsigned old_mstatus = RV_CLEAR_CSR(mstatus, MSTATUS_MIE); ret = REG_READ(INTERRUPT_CORE0_CPU_INT_THRESH_REG); REG_WRITE(INTERRUPT_CORE0_CPU_INT_THRESH_REG, RVHAL_EXCM_LEVEL); RV_SET_CSR(mstatus, old_mstatus & MSTATUS_MIE); return ret; } /* * See header file for description. */ StackType_t *pxPortInitialiseStack(StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters) { extern uint32_t __global_pointer$; /* Simulate the stack frame as it would be created by a context switch interrupt. */ pxTopOfStack -= RV_STK_FRMSZ; RvExcFrame *frame = (RvExcFrame *)pxTopOfStack; frame->ra = (UBaseType_t)prvTaskExitError; frame->mepc = (UBaseType_t)pxCode; frame->a0 = (UBaseType_t)pvParameters; frame->gp = (UBaseType_t)&__global_pointer$; frame->a1 = 0x11111111; frame->a2 = 0x22222222; frame->a3 = 0x33333333; return (StackType_t *)frame; } void vPortSysTickHandler(void) { systimer_ll_clear_alarm_int(SYSTIMER_ALARM_0); if (!uxSchedulerRunning) { return; } if (xTaskIncrementTick() != pdFALSE) { vTaskSwitchContext(); } } BaseType_t xPortStartScheduler(void) { vPortSetupTimer(); vPortSetupSoftwareInterrupt(); uxCriticalNesting = 0; uxSchedulerRunning = 0; /* this means first yield */ esprv_intc_int_set_threshold(1); /* set global INTC masking level */ riscv_global_interrupts_enable(); vPortYield(); /*Should not get here*/ return pdFALSE; } void vPortEndScheduler(void) { /* very unlikely this function will be called, so just trap here */ while (1) ; } void vPortSoftwareInterrupt(void) { uxSchedulerRunning = 1; vTaskSwitchContext(); REG_WRITE(SYSTEM_CPU_INTR_FROM_CPU_0_REG, 0); } void vPortYieldOtherCore(BaseType_t coreid) { (void)coreid; vPortYield(); } void vPortYield(void) { if (uxInterruptNesting) { vPortYieldFromISR(); } else { REG_WRITE(SYSTEM_CPU_INTR_FROM_CPU_0_REG, 1); /* There are 3-4 instructions of latency between triggering the software interrupt and the CPU interrupt happening. Make sure it happened before we return, otherwise vTaskDelay() may return and execute 1-2 instructions before the delay actually happens. (We could use the WFI instruction here, but there is a chance that the interrupt will happen while evaluating the other two conditions for an instant yield, and if that happens then the WFI would be waiting for the next interrupt to occur...) */ while(uxSchedulerRunning && uxCriticalNesting == 0 && REG_READ(SYSTEM_CPU_INTR_FROM_CPU_0_REG) != 0) { } } } void vPortYieldFromISR(void) { vTaskSwitchContext(); } void vPortSetStackWatchpoint(void *pxStackStart) { (void)pxStackStart; // TODO ESP32-C3 IDF-2207 } BaseType_t xPortInIsrContext(void) { return uxInterruptNesting; } BaseType_t IRAM_ATTR xPortInterruptedFromISRContext(void) { /* For single core, this can be the same as xPortInIsrContext() because reading it is atomic */ return uxInterruptNesting; } void vPortCPUInitializeMutex(portMUX_TYPE *mux) { (void)mux; } void vPortCPUAcquireMutex(portMUX_TYPE *mux) { (void)mux; } bool vPortCPUAcquireMutexTimeout(portMUX_TYPE *mux, int timeout_cycles) { (void)mux; (void)timeout_cycles; return true; } void vPortCPUReleaseMutex(portMUX_TYPE *mux) { (void)mux; } void __attribute__((weak)) vApplicationStackOverflowHook(TaskHandle_t xTask, char *pcTaskName) { #define ERR_STR1 "***ERROR*** A stack overflow in task " #define ERR_STR2 " has been detected." const char *str[] = {ERR_STR1, pcTaskName, ERR_STR2}; char buf[sizeof(ERR_STR1) + CONFIG_FREERTOS_MAX_TASK_NAME_LEN + sizeof(ERR_STR2) + 1 /* null char */] = {0}; char *dest = buf; for (int i = 0; i < sizeof(str) / sizeof(str[0]); i++) { dest = strcat(dest, str[i]); } esp_system_abort(buf); } extern void esp_startup_start_app_common(void); void esp_startup_start_app(void) { esp_startup_start_app_common(); ESP_LOGI(TAG, "Starting scheduler."); vTaskStartScheduler(); }