# This example supports running on the SPI1 bus, which is shared with SPI flash accessed by the
# cache. When doing transaction on SPI1 bus, data cannot be fetched from the flash, so all the data
# used during this time should be put into the internal RAM.

[mapping:eeprom]
archive: libeeprom.a
entries:
    if EXAMPLE_USE_SPI1_PINS = y:
        * (noflash)
        # Following code are not used during SPI1 bus or bus option
        spi_eeprom: eeprom_wait_done_by_intr (default)
        spi_eeprom: spi_eeprom_deinit (default)
        spi_eeprom: spi_eeprom_init (default)

[mapping:ext_newlib]
archive: libnewlib.a
entries:
    if EXAMPLE_USE_SPI1_PINS = y:
        time:usleep (noflash)