menu "ESP32S3-Specific" visible if IDF_TARGET_ESP32S3 choice ESP32S3_DEFAULT_CPU_FREQ_MHZ prompt "CPU frequency" default ESP32S3_DEFAULT_CPU_FREQ_40 if IDF_ENV_FPGA default ESP32S3_DEFAULT_CPU_FREQ_160 if !IDF_ENV_FPGA help CPU frequency to be set on application startup. config ESP32S3_DEFAULT_CPU_FREQ_40 bool "40 MHz" depends on IDF_ENV_FPGA config ESP32S3_DEFAULT_CPU_FREQ_80 bool "80 MHz" config ESP32S3_DEFAULT_CPU_FREQ_160 bool "160 MHz" config ESP32S3_DEFAULT_CPU_FREQ_240 bool "240 MHz" endchoice config ESP32S3_DEFAULT_CPU_FREQ_MHZ int default 40 if ESP32S3_DEFAULT_CPU_FREQ_40 default 80 if ESP32S3_DEFAULT_CPU_FREQ_80 default 160 if ESP32S3_DEFAULT_CPU_FREQ_160 default 240 if ESP32S3_DEFAULT_CPU_FREQ_240 menu "Cache config" choice ESP32S3_INSTRUCTION_CACHE_SIZE prompt "Instruction cache size" default ESP32S3_INSTRUCTION_CACHE_16KB help Instruction cache size to be set on application startup. If you use 16KB instruction cache rather than 32KB instruction cache, then the other 16KB will be managed by heap allocator. config ESP32S3_INSTRUCTION_CACHE_16KB bool "16KB" config ESP32S3_INSTRUCTION_CACHE_32KB bool "32KB" endchoice config ESP32S3_INSTRUCTION_CACHE_SIZE hex default 0x4000 if ESP32S3_INSTRUCTION_CACHE_16KB default 0x8000 if ESP32S3_INSTRUCTION_CACHE_32KB choice ESP32S3_ICACHE_ASSOCIATED_WAYS prompt "Instruction cache associated ways" default ESP32S3_INSTRUCTION_CACHE_8WAYS help Instruction cache associated ways to be set on application startup. config ESP32S3_INSTRUCTION_CACHE_4WAYS bool "4 ways" config ESP32S3_INSTRUCTION_CACHE_8WAYS bool "8 ways" endchoice config ESP32S3_ICACHE_ASSOCIATED_WAYS int default 4 if ESP32S3_INSTRUCTION_CACHE_4WAYS default 8 if ESP32S3_INSTRUCTION_CACHE_8WAYS choice ESP32S3_INSTRUCTION_CACHE_LINE_SIZE prompt "Instruction cache line size" default ESP32S3_INSTRUCTION_CACHE_LINE_32B help Instruction cache line size to be set on application startup. config ESP32S3_INSTRUCTION_CACHE_LINE_16B bool "16 Bytes" depends on ESP32S3_INSTRUCTION_CACHE_16KB config ESP32S3_INSTRUCTION_CACHE_LINE_32B bool "32 Bytes" endchoice config ESP32S3_INSTRUCTION_CACHE_LINE_SIZE int default 16 if ESP32S3_INSTRUCTION_CACHE_LINE_16B default 32 if ESP32S3_INSTRUCTION_CACHE_LINE_32B config ESP32S3_INSTRUCTION_CACHE_WRAP bool ## TODO IDF-4307 default "n" depends on !SPIRAM_ECC_ENABLE help If enabled, instruction cache will use wrap mode to read spi flash or spi ram. The wrap length equals to ESP32S3_INSTRUCTION_CACHE_LINE_SIZE. However, it depends on complex conditions. choice ESP32S3_DATA_CACHE_SIZE prompt "Data cache size" default ESP32S3_DATA_CACHE_32KB help Data cache size to be set on application startup. If you use 32KB data cache rather than 64KB data cache, the other 32KB will be added to the heap. config ESP32S3_DATA_CACHE_16KB bool "16KB" config ESP32S3_DATA_CACHE_32KB bool "32KB" config ESP32S3_DATA_CACHE_64KB bool "64KB" endchoice config ESP32S3_DATA_CACHE_SIZE hex # For 16KB the actual configuration is 32kb cache, but 16kb will be reserved for heap at startup default 0x8000 if ESP32S3_DATA_CACHE_16KB default 0x8000 if ESP32S3_DATA_CACHE_32KB default 0x10000 if ESP32S3_DATA_CACHE_64KB choice ESP32S3_DCACHE_ASSOCIATED_WAYS prompt "Data cache associated ways" default ESP32S3_DATA_CACHE_8WAYS help Data cache associated ways to be set on application startup. config ESP32S3_DATA_CACHE_4WAYS bool "4 ways" config ESP32S3_DATA_CACHE_8WAYS bool "8 ways" endchoice config ESP32S3_DCACHE_ASSOCIATED_WAYS int default 4 if ESP32S3_DATA_CACHE_4WAYS default 8 if ESP32S3_DATA_CACHE_8WAYS choice ESP32S3_DATA_CACHE_LINE_SIZE prompt "Data cache line size" default ESP32S3_DATA_CACHE_LINE_32B help Data cache line size to be set on application startup. config ESP32S3_DATA_CACHE_LINE_16B bool "16 Bytes" depends on ESP32S3_DATA_CACHE_16KB || ESP32S3_DATA_CACHE_32KB config ESP32S3_DATA_CACHE_LINE_32B bool "32 Bytes" config ESP32S3_DATA_CACHE_LINE_64B bool "64 Bytes" endchoice config ESP32S3_DATA_CACHE_LINE_SIZE int default 16 if ESP32S3_DATA_CACHE_LINE_16B default 32 if ESP32S3_DATA_CACHE_LINE_32B default 64 if ESP32S3_DATA_CACHE_LINE_64B config ESP32S3_DATA_CACHE_WRAP bool ## TODO IDF-4307 default "n" depends on !SPIRAM_ECC_ENABLE help If enabled, data cache will use wrap mode to read spi flash or spi ram. The wrap length equals to ESP32S3_DATA_CACHE_LINE_SIZE. However, it depends on complex conditions. endmenu # Cache config # Hint: to support SPIRAM across multiple chips, check CONFIG_SPIRAM instead config ESP32S3_SPIRAM_SUPPORT bool "Support for external, SPI-connected RAM" default "n" select SPIRAM help This enables support for an external SPI RAM chip, connected in parallel with the main SPI flash chip. menu "SPI RAM config" depends on ESP32S3_SPIRAM_SUPPORT choice SPIRAM_MODE prompt "Mode (QUAD/OCT) of SPI RAM chip in use" default SPIRAM_MODE_QUAD config SPIRAM_MODE_QUAD bool "Quad Mode PSRAM" config SPIRAM_MODE_OCT bool "Octal Mode PSRAM" endchoice choice SPIRAM_TYPE prompt "Type of SPIRAM chip in use" default SPIRAM_TYPE_AUTO config SPIRAM_TYPE_AUTO bool "Auto-detect" config SPIRAM_TYPE_ESPPSRAM16 bool "ESP-PSRAM16 or APS1604" depends on SPIRAM_MODE_QUAD config SPIRAM_TYPE_ESPPSRAM32 bool "ESP-PSRAM32 or IS25WP032" depends on SPIRAM_MODE_QUAD config SPIRAM_TYPE_ESPPSRAM64 bool "ESP-PSRAM64 , LY68L6400 or APS6408" endchoice config SPIRAM_SIZE int default -1 if SPIRAM_TYPE_AUTO default 2097152 if SPIRAM_TYPE_ESPPSRAM16 default 4194304 if SPIRAM_TYPE_ESPPSRAM32 default 8388608 if SPIRAM_TYPE_ESPPSRAM64 default 16777216 if SPIRAM_TYPE_ESPPSRAM128 default 33554432 if SPIRAM_TYPE_ESPPSRAM256 default 0 menu "PSRAM Clock and CS IO for ESP32S3" depends on ESP32S3_SPIRAM_SUPPORT config DEFAULT_PSRAM_CLK_IO int "PSRAM CLK IO number" range 0 33 default 30 help The PSRAM Clock IO can be any unused GPIO, please refer to your hardware design. config DEFAULT_PSRAM_CS_IO int "PSRAM CS IO number" range 0 33 default 26 help The PSRAM CS IO can be any unused GPIO, please refer to your hardware design. endmenu config SPIRAM_FETCH_INSTRUCTIONS bool "Cache fetch instructions from SPI RAM" default n help If enabled, instruction in flash will be copied into SPIRAM. If SPIRAM_RODATA also enabled, you can run the instruction when erasing or programming the flash. config SPIRAM_RODATA bool "Cache load read only data from SPI RAM" default n help If enabled, rodata in flash will be copied into SPIRAM. If SPIRAM_FETCH_INSTRUCTIONS is also enabled, you can run the instruction when erasing or programming the flash. choice SPIRAM_SPEED prompt "Set RAM clock speed" default SPIRAM_SPEED_40M help Select the speed for the SPI RAM chip. config SPIRAM_SPEED_120M depends on SPIRAM_MODE_QUAD bool "120MHz clock speed" config SPIRAM_SPEED_80M bool "80MHz clock speed" config SPIRAM_SPEED_40M bool "40Mhz clock speed" endchoice config SPIRAM_SPEED int default 120 if SPIRAM_SPEED_120M default 80 if SPIRAM_SPEED_80M default 40 if SPIRAM_SPEED_40M source "$IDF_PATH/components/esp_hw_support/Kconfig.spiram.common" # insert non-chip-specific items here endmenu config ESP32S3_MEMMAP_TRACEMEM bool default "n" config ESP32S3_MEMMAP_TRACEMEM_TWOBANKS bool default "n" config ESP32S3_TRAX bool "Use TRAX tracing feature" default "n" select ESP32S3_MEMMAP_TRACEMEM help The esp32-s3 contains a feature which allows you to trace the execution path the processor has taken through the program. This is stored in a chunk of 32K (16K for single-processor) of memory that can't be used for general purposes anymore. Disable this if you do not know what this is. config ESP32S3_TRAX_TWOBANKS bool "Reserve memory for tracing both pro as well as app cpu execution" default "n" depends on ESP32S3_TRAX && !FREERTOS_UNICORE select ESP32S3_MEMMAP_TRACEMEM_TWOBANKS help The esp32-s3 contains a feature which allows you to trace the execution path the processor has taken through the program. This is stored in a chunk of 32K (16K for single-processor) of memory that can't be used for general purposes anymore. Disable this if you do not know what this is. config ESP32S3_TRACEMEM_RESERVE_DRAM hex default 0x8000 if ESP32S3_MEMMAP_TRACEMEM && ESP32S3_MEMMAP_TRACEMEM_TWOBANKS default 0x4000 if ESP32S3_MEMMAP_TRACEMEM && !ESP32S3_MEMMAP_TRACEMEM_TWOBANKS default 0x0 config ESP32S3_DEBUG_OCDAWARE bool "Make exception and panic handlers JTAG/OCD aware" default y select FREERTOS_DEBUG_OCDAWARE help The FreeRTOS panic and unhandled exception handers can detect a JTAG OCD debugger and instead of panicking, have the debugger stop on the offending instruction. config ESP32S3_BROWNOUT_DET bool "Hardware brownout detect & reset" depends on !IDF_ENV_FPGA default y help The ESP32-S3 has a built-in brownout detector which can detect if the voltage is lower than a specific value. If this happens, it will reset the chip in order to prevent unintended behaviour. choice ESP32S3_BROWNOUT_DET_LVL_SEL prompt "Brownout voltage level" depends on ESP32S3_BROWNOUT_DET default ESP32S3_BROWNOUT_DET_LVL_SEL_7 help The brownout detector will reset the chip when the supply voltage is approximately below this level. Note that there may be some variation of brownout voltage level between each ESP3-S3 chip. #The voltage levels here are estimates, more work needs to be done to figure out the exact voltages #of the brownout threshold levels. config ESP32S3_BROWNOUT_DET_LVL_SEL_7 bool "2.44V" config ESP32S3_BROWNOUT_DET_LVL_SEL_6 bool "2.56V" config ESP32S3_BROWNOUT_DET_LVL_SEL_5 bool "2.67V" config ESP32S3_BROWNOUT_DET_LVL_SEL_4 bool "2.84V" config ESP32S3_BROWNOUT_DET_LVL_SEL_3 bool "2.98V" config ESP32S3_BROWNOUT_DET_LVL_SEL_2 bool "3.19V" config ESP32S3_BROWNOUT_DET_LVL_SEL_1 bool "3.30V" endchoice config ESP32S3_BROWNOUT_DET_LVL int default 1 if ESP32S3_BROWNOUT_DET_LVL_SEL_1 default 2 if ESP32S3_BROWNOUT_DET_LVL_SEL_2 default 3 if ESP32S3_BROWNOUT_DET_LVL_SEL_3 default 4 if ESP32S3_BROWNOUT_DET_LVL_SEL_4 default 5 if ESP32S3_BROWNOUT_DET_LVL_SEL_5 default 6 if ESP32S3_BROWNOUT_DET_LVL_SEL_6 default 7 if ESP32S3_BROWNOUT_DET_LVL_SEL_7 # Note about the use of "FRC1" name: currently FRC1 timer is not used for # high resolution timekeeping anymore. Instead the esp_timer API, implemented # using FRC2 timer, is used. # FRC1 name in the option name is kept for compatibility. choice ESP32S3_TIME_SYSCALL prompt "Timers used for gettimeofday function" default ESP32S3_TIME_SYSCALL_USE_RTC_FRC1 help This setting defines which hardware timers are used to implement 'gettimeofday' and 'time' functions in C library. - If both high-resolution and RTC timers are used, timekeeping will continue in deep sleep. Time will be reported at 1 microsecond resolution. This is the default, and the recommended option. - If only high-resolution timer is used, gettimeofday will provide time at microsecond resolution. Time will not be preserved when going into deep sleep mode. - If only RTC timer is used, timekeeping will continue in deep sleep, but time will be measured at 6.(6) microsecond resolution. Also the gettimeofday function itself may take longer to run. - If no timers are used, gettimeofday and time functions return -1 and set errno to ENOSYS. - When RTC is used for timekeeping, two RTC_STORE registers are used to keep time in deep sleep mode. config ESP32S3_TIME_SYSCALL_USE_RTC_FRC1 bool "RTC and high-resolution timer" select ESP_TIME_FUNCS_USE_RTC_TIMER select ESP_TIME_FUNCS_USE_ESP_TIMER config ESP32S3_TIME_SYSCALL_USE_RTC bool "RTC" select ESP_TIME_FUNCS_USE_RTC_TIMER config ESP32S3_TIME_SYSCALL_USE_FRC1 bool "High-resolution timer" select ESP_TIME_FUNCS_USE_ESP_TIMER config ESP32S3_TIME_SYSCALL_USE_NONE bool "None" select ESP_TIME_FUNCS_USE_NONE endchoice choice ESP32S3_RTC_CLK_SRC prompt "RTC clock source" default ESP32S3_RTC_CLK_SRC_INT_RC help Choose which clock is used as RTC clock source. config ESP32S3_RTC_CLK_SRC_INT_RC bool "Internal 150kHz RC oscillator" config ESP32S3_RTC_CLK_SRC_EXT_CRYS bool "External 32kHz crystal" select ESP_SYSTEM_RTC_EXT_XTAL config ESP32S3_RTC_CLK_SRC_EXT_OSC bool "External 32kHz oscillator at 32K_XP pin" select ESP_SYSTEM_RTC_EXT_OSC config ESP32S3_RTC_CLK_SRC_INT_8MD256 bool "Internal 8MHz oscillator, divided by 256 (~32kHz)" endchoice config ESP32S3_RTC_CLK_CAL_CYCLES int "Number of cycles for RTC_SLOW_CLK calibration" default 3000 if ESP32S3_RTC_CLK_SRC_EXT_CRYS || ESP32S3_RTC_CLK_SRC_EXT_OSC || ESP32S3_RTC_CLK_SRC_INT_8MD256 default 1024 if ESP32S3_RTC_CLK_SRC_INT_RC range 0 27000 if ESP32S3_RTC_CLK_SRC_EXT_CRYS || ESP32S3_RTC_CLK_SRC_EXT_OSC || ESP32S3_RTC_CLK_SRC_INT_8MD256 range 0 32766 if ESP32S3_RTC_CLK_SRC_INT_RC help When the startup code initializes RTC_SLOW_CLK, it can perform calibration by comparing the RTC_SLOW_CLK frequency with main XTAL frequency. This option sets the number of RTC_SLOW_CLK cycles measured by the calibration routine. Higher numbers increase calibration precision, which may be important for applications which spend a lot of time in deep sleep. Lower numbers reduce startup time. When this option is set to 0, clock calibration will not be performed at startup, and approximate clock frequencies will be assumed: - 150000 Hz if internal RC oscillator is used as clock source. For this use value 1024. - 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more. In case more value will help improve the definition of the launch of the crystal. If the crystal could not start, it will be switched to internal RC. config ESP32S3_DEEP_SLEEP_WAKEUP_DELAY int "Extra delay in deep sleep wake stub (in us)" default 2000 range 0 5000 help When ESP32S3 exits deep sleep, the CPU and the flash chip are powered on at the same time. CPU will run deep sleep stub first, and then proceed to load code from flash. Some flash chips need sufficient time to pass between power on and first read operation. By default, without any extra delay, this time is approximately 900us, although some flash chip types need more than that. By default extra delay is set to 2000us. When optimizing startup time for applications which require it, this value may be reduced. If you are seeing "flash read err, 1000" message printed to the console after deep sleep reset, try increasing this value. config ESP32S3_NO_BLOBS bool "No Binary Blobs" depends on !BT_ENABLED default n help If enabled, this disables the linking of binary libraries in the application build. Note that after enabling this Wi-Fi/Bluetooth will not work. config ESP32S3_RTCDATA_IN_FAST_MEM bool "Place RTC_DATA_ATTR and RTC_RODATA_ATTR variables into RTC fast memory segment" default n help This option allows to place .rtc_data and .rtc_rodata sections into RTC fast memory segment to free the slow memory region for ULP programs. config ESP32S3_USE_FIXED_STATIC_RAM_SIZE bool "Use fixed static RAM size" default n help If this option is disabled, the DRAM part of the heap starts right after the .bss section, within the dram0_0 region. As a result, adding or removing some static variables will change the available heap size. If this option is enabled, the DRAM part of the heap starts right after the dram0_0 region, where its length is set with ESP32S3_FIXED_STATIC_RAM_SIZE config ESP32S3_FIXED_STATIC_RAM_SIZE hex "Fixed Static RAM size" default 0x10000 range 0 0x34000 depends on ESP32S3_USE_FIXED_STATIC_RAM_SIZE help RAM size dedicated for static variables (.data & .bss sections). endmenu # ESP32S3-Specific