menu "ESP32S2-specific" # TODO: this component simply shouldn't be included # in the build at the CMake level, but this is currently # not working so we just hide all items here visible if IDF_TARGET_ESP32S2 choice ESP32S2_REV_MIN prompt "Minimum Supported ESP32-S2 Revision" default ESP32S2_REV_MIN_0 help Required minimum chip revision. ESP-IDF will check for it and reject to boot if the chip revision fails the check. This ensures the chip used will have some modifications (features, or bugfixes). The complied binary will only support chips above this revision, this will also help to reduce binary size. config ESP32S2_REV_MIN_0 bool "Rev v0.0 (ECO0)" config ESP32S2_REV_MIN_1 bool "Rev v1.0 (ECO1)" endchoice config ESP32S2_REV_MIN_FULL int default 0 if ESP32S2_REV_MIN_0 default 100 if ESP32S2_REV_MIN_1 config ESP_REV_MIN_FULL int default ESP32S2_REV_MIN_FULL # # MAX Revision # choice ESP32S2_REV_MAX_FULL_STR prompt "Maximum Supported ESP32-S2 Revision" config ESP32S2_REV_MAX_FULL_STR_OPT bool "Rev v1.99" endchoice # Maximum revision that IDF supports. # It can not be changed by user. # Only Espressif can change it when a new version will be supported in IDF. # Supports all chips starting from ESP32S2_REV_MIN_FULL to ESP32S2_REV_MAX_FULL config ESP32S2_REV_MAX_FULL int default 199 # keep in sync the "Maximum Supported Revision" description with this value config ESP_REV_MAX_FULL int default ESP32S2_REV_MAX_FULL choice ESP32S2_DEFAULT_CPU_FREQ_MHZ prompt "CPU frequency" default ESP32S2_DEFAULT_CPU_FREQ_160 if !IDF_ENV_FPGA default ESP32S2_DEFAULT_CPU_FREQ_FPGA if IDF_ENV_FPGA help CPU frequency to be set on application startup. config ESP32S2_DEFAULT_CPU_FREQ_FPGA depends on IDF_ENV_FPGA bool "FPGA" config ESP32S2_DEFAULT_CPU_FREQ_80 bool "80 MHz" config ESP32S2_DEFAULT_CPU_FREQ_160 bool "160 MHz" config ESP32S2_DEFAULT_CPU_FREQ_240 bool "240 MHz" endchoice config ESP32S2_DEFAULT_CPU_FREQ_MHZ int default 40 if IDF_ENV_FPGA default 80 if ESP32S2_DEFAULT_CPU_FREQ_80 default 160 if ESP32S2_DEFAULT_CPU_FREQ_160 default 240 if ESP32S2_DEFAULT_CPU_FREQ_240 menu "Cache config" choice ESP32S2_INSTRUCTION_CACHE_SIZE prompt "Instruction cache size" default ESP32S2_INSTRUCTION_CACHE_8KB help Instruction cache size to be set on application startup. If you use 8KB instruction cache rather than 16KB instruction cache, then the other 8KB will be added to the heap. config ESP32S2_INSTRUCTION_CACHE_8KB bool "8KB" config ESP32S2_INSTRUCTION_CACHE_16KB bool "16KB" endchoice choice ESP32S2_INSTRUCTION_CACHE_LINE_SIZE prompt "Instruction cache line size" default ESP32S2_INSTRUCTION_CACHE_LINE_32B help Instruction cache line size to be set on application startup. config ESP32S2_INSTRUCTION_CACHE_LINE_16B bool "16 Bytes" config ESP32S2_INSTRUCTION_CACHE_LINE_32B bool "32 Bytes" endchoice choice ESP32S2_DATA_CACHE_SIZE prompt "Data cache size" default ESP32S2_DATA_CACHE_0KB if !ESP32S2_SPIRAM_SUPPORT default ESP32S2_DATA_CACHE_8KB if ESP32S2_SPIRAM_SUPPORT help Data cache size to be set on application startup. If you use 0KB data cache, the other 16KB will be added to the heap If you use 8KB data cache rather than 16KB data cache, the other 8KB will be added to the heap config ESP32S2_DATA_CACHE_0KB depends on !ESP32S2_SPIRAM_SUPPORT bool "0KB" config ESP32S2_DATA_CACHE_8KB bool "8KB" config ESP32S2_DATA_CACHE_16KB bool "16KB" endchoice choice ESP32S2_DATA_CACHE_LINE_SIZE prompt "Data cache line size" default ESP32S2_DATA_CACHE_LINE_32B help Data cache line size to be set on application startup. config ESP32S2_DATA_CACHE_LINE_16B bool "16 Bytes" config ESP32S2_DATA_CACHE_LINE_32B bool "32 Bytes" endchoice config ESP32S2_INSTRUCTION_CACHE_WRAP bool "Enable instruction cache wrap" default "n" help If enabled, instruction cache will use wrap mode to read spi flash (maybe spiram). The wrap length equals to INSTRUCTION_CACHE_LINE_SIZE. However, it depends on complex conditions. config ESP32S2_DATA_CACHE_WRAP bool "Enable data cache wrap" default "n" help If enabled, data cache will use wrap mode to read spiram (maybe spi flash). The wrap length equals to DATA_CACHE_LINE_SIZE. However, it depends on complex conditions. endmenu # Cache config # Note: to support SPIRAM across multiple chips, check CONFIG_SPIRAM # instead config ESP32S2_SPIRAM_SUPPORT bool "Support for external, SPI-connected RAM" default "n" select SPIRAM help This enables support for an external SPI RAM chip, connected in parallel with the main SPI flash chip. menu "SPI RAM config" depends on ESP32S2_SPIRAM_SUPPORT choice SPIRAM_TYPE prompt "Type of SPI RAM chip in use" default SPIRAM_TYPE_AUTO config SPIRAM_TYPE_AUTO bool "Auto-detect" config SPIRAM_TYPE_ESPPSRAM16 bool "ESP-PSRAM16 or APS1604" config SPIRAM_TYPE_ESPPSRAM32 bool "ESP-PSRAM32 or IS25WP032" config SPIRAM_TYPE_ESPPSRAM64 bool "ESP-PSRAM64 or LY68L6400" endchoice config SPIRAM_SIZE int default -1 if SPIRAM_TYPE_AUTO default 2097152 if SPIRAM_TYPE_ESPPSRAM16 default 4194304 if SPIRAM_TYPE_ESPPSRAM32 default 8388608 if SPIRAM_TYPE_ESPPSRAM64 default 0 config SPIRAM_CLK_IO int default 30 config SPIRAM_CS_IO int default 26 config SPIRAM_FETCH_INSTRUCTIONS bool "Cache fetch instructions from SPI RAM" default n help If enabled, instruction in flash will be copied into SPIRAM. If SPIRAM_RODATA also enabled, you can run the instruction when erasing or programming the flash. config SPIRAM_RODATA bool "Cache load read only data from SPI RAM" default n help If enabled, radata in flash will be copied into SPIRAM. If SPIRAM_FETCH_INSTRUCTIONS also enabled, you can run the instruction when erasing or programming the flash. config SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY bool "Allow external memory as an argument to xTaskCreateStatic" default n help Accessing memory in SPIRAM has certain restrictions, so task stacks allocated by xTaskCreate are by default allocated from internal RAM. This option allows for passing memory allocated from SPIRAM to be passed to xTaskCreateStatic. This should only be used for tasks where the stack is never accessed while the cache is disabled. Cannot be used together with ESP_COREDUMP_ENABLE_TO_FLASH. choice SPIRAM_SPEED prompt "Set RAM clock speed" default SPIRAM_SPEED_40M help Select the speed for the SPI RAM chip. config SPIRAM_SPEED_80M bool "80MHz clock speed" config SPIRAM_SPEED_40M bool "40Mhz clock speed" config SPIRAM_SPEED_26M bool "26Mhz clock speed" config SPIRAM_SPEED_20M bool "20Mhz clock speed" endchoice # insert non-chip-specific items here NOERROR source "$IDF_PATH/components/esp_hw_support/Kconfig.spiram.common" endmenu config ESP32S2_MEMMAP_TRACEMEM bool default "n" config ESP32S2_MEMMAP_TRACEMEM_TWOBANKS bool default "n" config ESP32S2_TRAX bool "Use TRAX tracing feature" default "n" select ESP32S2_MEMMAP_TRACEMEM help The ESP32S2 contains a feature which allows you to trace the execution path the processor has taken through the program. This is stored in a chunk of 32K (16K for single-processor) of memory that can't be used for general purposes anymore. Disable this if you do not know what this is. config ESP32S2_TRACEMEM_RESERVE_DRAM hex default 0x8000 if ESP32S2_MEMMAP_TRACEMEM && ESP32S2_MEMMAP_TRACEMEM_TWOBANKS default 0x4000 if ESP32S2_MEMMAP_TRACEMEM && !ESP32S2_MEMMAP_TRACEMEM_TWOBANKS default 0x0 config ESP32S2_ULP_COPROC_ENABLED bool "Enable Ultra Low Power (ULP) Coprocessor" default "n" help Set to 'y' if you plan to load a firmware for the coprocessor. If this option is enabled, further coprocessor configuration will appear in the Components menu. config ESP32S2_ULP_COPROC_RESERVE_MEM int prompt "RTC slow memory reserved for coprocessor" if ESP32S2_ULP_COPROC_ENABLED default 2048 if ESP32S2_ULP_COPROC_ENABLED range 32 8176 if ESP32S2_ULP_COPROC_ENABLED default 0 if !ESP32S2_ULP_COPROC_ENABLED range 0 0 if !ESP32S2_ULP_COPROC_ENABLED help Bytes of memory to reserve for ULP coprocessor firmware & data. Data is reserved at the beginning of RTC slow memory. config ESP32S2_ULP_COPROC_RISCV bool "Enable RISC-V as ULP coprocessor" depends on ESP32S2_ULP_COPROC_ENABLED default n help Set this to y to use the RISC-V coprocessor instead of the FSM-ULP. config ESP32S2_DEBUG_OCDAWARE bool "Make exception and panic handlers JTAG/OCD aware" default y select FREERTOS_DEBUG_OCDAWARE help The FreeRTOS panic and unhandled exception handers can detect a JTAG OCD debugger and instead of panicking, have the debugger stop on the offending instruction. config ESP32S2_BROWNOUT_DET bool "Hardware brownout detect & reset" depends on !IDF_ENV_FPGA default y help The ESP32-S2 has a built-in brownout detector which can detect if the voltage is lower than a specific value. If this happens, it will reset the chip in order to prevent unintended behaviour. choice ESP32S2_BROWNOUT_DET_LVL_SEL prompt "Brownout voltage level" depends on ESP32S2_BROWNOUT_DET default ESP32S2_BROWNOUT_DET_LVL_SEL_7 help The brownout detector will reset the chip when the supply voltage is approximately below this level. Note that there may be some variation of brownout voltage level between each ESP3-S2 chip. #The voltage levels here are estimates, more work needs to be done to figure out the exact voltages #of the brownout threshold levels. config ESP32S2_BROWNOUT_DET_LVL_SEL_7 bool "2.44V" config ESP32S2_BROWNOUT_DET_LVL_SEL_6 bool "2.56V" config ESP32S2_BROWNOUT_DET_LVL_SEL_5 bool "2.67V" config ESP32S2_BROWNOUT_DET_LVL_SEL_4 bool "2.84V" config ESP32S2_BROWNOUT_DET_LVL_SEL_3 bool "2.98V" config ESP32S2_BROWNOUT_DET_LVL_SEL_2 bool "3.19V" config ESP32S2_BROWNOUT_DET_LVL_SEL_1 bool "3.30V" endchoice config ESP32S2_BROWNOUT_DET_LVL int default 1 if ESP32S2_BROWNOUT_DET_LVL_SEL_1 default 2 if ESP32S2_BROWNOUT_DET_LVL_SEL_2 default 3 if ESP32S2_BROWNOUT_DET_LVL_SEL_3 default 4 if ESP32S2_BROWNOUT_DET_LVL_SEL_4 default 5 if ESP32S2_BROWNOUT_DET_LVL_SEL_5 default 6 if ESP32S2_BROWNOUT_DET_LVL_SEL_6 default 7 if ESP32S2_BROWNOUT_DET_LVL_SEL_7 # Note about the use of "FRC1" name: currently FRC1 timer is not used for # high resolution timekeeping anymore. Instead the esp_timer API, implemented # using FRC2 timer, is used. # FRC1 name in the option name is kept for compatibility. choice ESP32S2_TIME_SYSCALL prompt "Timers used for gettimeofday function" default ESP32S2_TIME_SYSCALL_USE_RTC_FRC1 help This setting defines which hardware timers are used to implement 'gettimeofday' and 'time' functions in C library. - If both high-resolution and RTC timers are used, timekeeping will continue in deep sleep. Time will be reported at 1 microsecond resolution. This is the default, and the recommended option. - If only high-resolution timer is used, gettimeofday will provide time at microsecond resolution. Time will not be preserved when going into deep sleep mode. - If only RTC timer is used, timekeeping will continue in deep sleep, but time will be measured at 6.(6) microsecond resolution. Also the gettimeofday function itself may take longer to run. - If no timers are used, gettimeofday and time functions return -1 and set errno to ENOSYS. - When RTC is used for timekeeping, two RTC_STORE registers are used to keep time in deep sleep mode. config ESP32S2_TIME_SYSCALL_USE_RTC_FRC1 bool "RTC and high-resolution timer" select ESP_TIME_FUNCS_USE_RTC_TIMER select ESP_TIME_FUNCS_USE_ESP_TIMER config ESP32S2_TIME_SYSCALL_USE_RTC bool "RTC" select ESP_TIME_FUNCS_USE_RTC_TIMER config ESP32S2_TIME_SYSCALL_USE_FRC1 bool "High-resolution timer" select ESP_TIME_FUNCS_USE_ESP_TIMER config ESP32S2_TIME_SYSCALL_USE_NONE bool "None" select ESP_TIME_FUNCS_USE_NONE endchoice choice ESP32S2_RTC_CLK_SRC prompt "RTC clock source" default ESP32S2_RTC_CLK_SRC_INT_RC help Choose which clock is used as RTC clock source. - "Internal 90kHz oscillator" option provides lowest deep sleep current consumption, and does not require extra external components. However frequency stability with respect to temperature is poor, so time may drift in deep/light sleep modes. - "External 32kHz crystal" provides better frequency stability, at the expense of slightly higher (1uA) deep sleep current consumption. - "External 32kHz oscillator" allows using 32kHz clock generated by an external circuit. In this case, external clock signal must be connected to 32K_XN pin. Amplitude should be <1.2V in case of sine wave signal, and <1V in case of square wave signal. Common mode voltage should be 0.1 < Vcm < 0.5Vamp, where Vamp is the signal amplitude. Additionally, 1nF capacitor must be connected between 32K_XP pin and ground. 32K_XP pin can not be used as a GPIO in this case. - "Internal 8MHz oscillator divided by 256" option results in higher deep sleep current (by 5uA) but has better frequency stability than the internal 90kHz oscillator. It does not require external components. config ESP32S2_RTC_CLK_SRC_INT_RC bool "Internal 90kHz RC oscillator" config ESP32S2_RTC_CLK_SRC_EXT_CRYS bool "External 32kHz crystal" select ESP_SYSTEM_RTC_EXT_XTAL config ESP32S2_RTC_CLK_SRC_EXT_OSC bool "External 32kHz oscillator at 32K_XN pin" select ESP_SYSTEM_RTC_EXT_OSC config ESP32S2_RTC_CLK_SRC_INT_8MD256 bool "Internal 8MHz oscillator, divided by 256 (~32kHz)" endchoice config ESP32S2_RTC_CLK_CAL_CYCLES int "Number of cycles for RTC_SLOW_CLK calibration" default 3000 if ESP32S2_RTC_CLK_SRC_EXT_CRYS || ESP32S2_RTC_CLK_SRC_EXT_OSC || ESP32S2_RTC_CLK_SRC_INT_8MD256 default 576 if ESP32S2_RTC_CLK_SRC_INT_RC range 0 125000 help When the startup code initializes RTC_SLOW_CLK, it can perform calibration by comparing the RTC_SLOW_CLK frequency with main XTAL frequency. This option sets the number of RTC_SLOW_CLK cycles measured by the calibration routine. Higher numbers increase calibration precision, which may be important for applications which spend a lot of time in deep sleep. Lower numbers reduce startup time. When this option is set to 0, clock calibration will not be performed at startup, and approximate clock frequencies will be assumed: - 90000 Hz if internal RC oscillator is used as clock source. For this use value 1024. - 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more. In case more value will help improve the definition of the launch of the crystal. If the crystal could not start, it will be switched to internal RC. config ESP32S2_RTC_XTAL_CAL_RETRY int "Number of attempts to repeat 32k XTAL calibration" default 3 depends on ESP32S2_RTC_CLK_SRC_EXT_CRYS help Number of attempts to repeat 32k XTAL calibration before giving up and switching to the internal RC. Increase this option if the 32k crystal oscillator does not start and switches to internal RC. config ESP32S2_NO_BLOBS bool "No Binary Blobs" depends on !BT_ENABLED default n help If enabled, this disables the linking of binary libraries in the application build. Note that after enabling this Wi-Fi/Bluetooth will not work. config ESP32S2_KEEP_USB_ALIVE bool "Keep USB peripheral enabled at start up" if !ESP_CONSOLE_USB_CDC default y if ESP_CONSOLE_USB_CDC help During the application initialization process, all the peripherals except UARTs and timers are reset. Enable this option to keep USB peripheral enabled. This option is automatically enabled if "USB CDC" console is selected. config ESP32S2_RTCDATA_IN_FAST_MEM bool "Place RTC_DATA_ATTR and RTC_RODATA_ATTR variables into RTC fast memory segment" default n help This option allows to place .rtc_data and .rtc_rodata sections into RTC fast memory segment to free the slow memory region for ULP programs. config ESP32S2_USE_FIXED_STATIC_RAM_SIZE bool "Use fixed static RAM size" default n help If this option is disabled, the DRAM part of the heap starts right after the .bss section, within the dram0_0 region. As a result, adding or removing some static variables will change the available heap size. If this option is enabled, the DRAM part of the heap starts right after the dram0_0 region, where its length is set with ESP32S2_FIXED_STATIC_RAM_SIZE config ESP32S2_FIXED_STATIC_RAM_SIZE hex "Fixed Static RAM size" default 0x10000 range 0 0x34000 depends on ESP32S2_USE_FIXED_STATIC_RAM_SIZE help RAM size dedicated for static variables (.data & .bss sections). endmenu # ESP32S2-Specific