menu "Ethernet" # Invisible item that is enabled if any Ethernet selection is made config ETH_ENABLED bool menuconfig ETH_USE_ESP32_EMAC depends on SOC_EMAC_SUPPORTED bool "Support ESP32 internal EMAC controller" default y select ETH_ENABLED help ESP32 integrates a 10/100M Ethernet MAC controller. if ETH_USE_ESP32_EMAC choice ETH_PHY_INTERFACE prompt "PHY interface" default ETH_PHY_INTERFACE_RMII help Select the communication interface between MAC and PHY chip. config ETH_PHY_INTERFACE_RMII bool "Reduced Media Independent Interface (RMII)" endchoice if ETH_PHY_INTERFACE_RMII choice ETH_RMII_CLK_MODE depends on IDF_TARGET_ESP32 prompt "RMII clock mode" default ETH_RMII_CLK_INPUT help Select external or internal RMII clock. config ETH_RMII_CLK_INPUT bool "Input RMII clock from external" help MAC will get RMII clock from outside. Note that ESP32 only supports GPIO0 to input the RMII clock. config ETH_RMII_CLK_OUTPUT bool "Output RMII clock from internal" help ESP32 can generate RMII clock by internal APLL. This clock can be routed to the external PHY device. ESP32 supports to route the RMII clock to GPIO0/16/17. endchoice endif # ETH_PHY_INTERFACE_RMII if ETH_RMII_CLK_INPUT config ETH_RMII_CLK_IN_GPIO depends on IDF_TARGET_ESP32 int range 0 0 default 0 help ESP32 only supports GPIO0 to input the RMII clock. endif # ETH_RMII_CLK_INPUT if ETH_RMII_CLK_OUTPUT config ETH_RMII_CLK_OUTPUT_GPIO0 depends on IDF_TARGET_ESP32 bool "Output RMII clock from GPIO0 (Experimental!)" default n help GPIO0 can be set to output a pre-divided PLL clock (test only!). Enabling this option will configure GPIO0 to output a 50MHz clock. In fact this clock doesn't have directly relationship with EMAC peripheral. Sometimes this clock won't work well with your PHY chip. You might need to add some extra devices after GPIO0 (e.g. inverter). Note that outputting RMII clock on GPIO0 is an experimental practice. If you want the Ethernet to work with WiFi, don't select GPIO0 output mode for stability. if !ETH_RMII_CLK_OUTPUT_GPIO0 config ETH_RMII_CLK_OUT_GPIO depends on IDF_TARGET_ESP32 int "RMII clock GPIO number" range 16 17 default 17 help Set the GPIO number to output RMII Clock. endif # !ETH_RMII_CLK_OUTPUT_GPIO0 endif # ETH_RMII_CLK_OUTPUT config ETH_DMA_BUFFER_SIZE int "Ethernet DMA buffer size (Byte)" range 256 1600 default 512 help Set the size of each buffer used by Ethernet MAC DMA. !! Important !! Make sure it is 64B aligned for ESP32P4! config ETH_DMA_RX_BUFFER_NUM int "Amount of Ethernet DMA Rx buffers" range 3 30 default 10 if IDF_TARGET_ESP32 default 20 if IDF_TARGET_ESP32P4 #ESP32P4 has smaller internal Rx FIFO help Number of DMA receive buffers. Each buffer's size is ETH_DMA_BUFFER_SIZE. Larger number of buffers could increase throughput somehow. config ETH_DMA_TX_BUFFER_NUM int "Amount of Ethernet DMA Tx buffers" range 3 30 default 10 help Number of DMA transmit buffers. Each buffer's size is ETH_DMA_BUFFER_SIZE. Larger number of buffers could increase throughput somehow. if ETH_DMA_RX_BUFFER_NUM > 15 config ETH_SOFT_FLOW_CONTROL bool "Enable software flow control" default n help Ethernet MAC engine on ESP32 doesn't feature a flow control logic. The MAC driver can perform a software flow control if you enable this option. Note that, if the RX buffer number is small, enabling software flow control will cause obvious performance loss. endif config ETH_IRAM_OPTIMIZATION bool "Enable IRAM optimization" default n help If enabled, functions related to RX/TX are placed into IRAM. It can improve Ethernet throughput. If disabled, all functions are placed into FLASH. endif # ETH_USE_ESP32_EMAC menuconfig ETH_USE_SPI_ETHERNET bool "Support SPI to Ethernet Module" default y select ETH_ENABLED help ESP-IDF can also support some SPI-Ethernet modules. if ETH_USE_SPI_ETHERNET config ETH_SPI_ETHERNET_DM9051 bool "Use DM9051" help DM9051 is a fast Ethernet controller with an SPI interface. It's also integrated with a 10/100M PHY and MAC. Select this to enable DM9051 driver. config ETH_SPI_ETHERNET_W5500 bool "Use W5500 (MAC RAW)" help W5500 is a HW TCP/IP embedded Ethernet controller. TCP/IP stack, 10/100 Ethernet MAC and PHY are embedded in a single chip. However the driver in ESP-IDF only enables the RAW MAC mode, making it compatible with the software TCP/IP stack. Say yes to enable W5500 driver. config ETH_SPI_ETHERNET_KSZ8851SNL bool "Use KSZ8851SNL" help The KSZ8851SNL is a single-chip Fast Ethernet controller consisting of a 10/100 physical layer transceiver (PHY), a MAC, and a Serial Peripheral Interface (SPI). Select this to enable KSZ8851SNL driver. endif # ETH_USE_SPI_ETHERNET menuconfig ETH_USE_OPENETH bool "Support OpenCores Ethernet MAC (for use with QEMU)" default n select ETH_ENABLED help OpenCores Ethernet MAC driver can be used when an ESP-IDF application is executed in QEMU. This driver is not supported when running on a real chip. if ETH_USE_OPENETH config ETH_OPENETH_DMA_RX_BUFFER_NUM int "Number of Ethernet DMA Rx buffers" range 1 64 default 4 help Number of DMA receive buffers, each buffer is 1600 bytes. config ETH_OPENETH_DMA_TX_BUFFER_NUM int "Number of Ethernet DMA Tx buffers" range 1 64 default 1 help Number of DMA transmit buffers, each buffer is 1600 bytes. endif # ETH_USE_OPENETH config ETH_TRANSMIT_MUTEX depends on ETH_ENABLED bool "Enable Transmit Mutex" default n help Prevents multiple accesses when Ethernet interface is used as shared resource and multiple functionalities might try to access it at a time. endmenu