menu "ESP32C3-Specific" visible if IDF_TARGET_ESP32C3 choice ESP32C3_DEFAULT_CPU_FREQ_MHZ prompt "CPU frequency" default ESP32C3_DEFAULT_CPU_FREQ_40 if IDF_ENV_FPGA default ESP32C3_DEFAULT_CPU_FREQ_160 if !IDF_ENV_FPGA help CPU frequency to be set on application startup. config ESP32C3_DEFAULT_CPU_FREQ_40 bool "40 MHz" depends on IDF_ENV_FPGA config ESP32C3_DEFAULT_CPU_FREQ_80 bool "80 MHz" config ESP32C3_DEFAULT_CPU_FREQ_160 bool "160 MHz" endchoice config ESP32C3_DEFAULT_CPU_FREQ_MHZ int default 40 if ESP32C3_DEFAULT_CPU_FREQ_40 default 80 if ESP32C3_DEFAULT_CPU_FREQ_80 default 160 if ESP32C3_DEFAULT_CPU_FREQ_160 choice ESP32C3_REV_MIN prompt "Minimum Supported ESP32-C3 Revision" default ESP32C3_REV_MIN_3 help Required minimum chip revision. ESP-IDF will check for it and reject to boot if the chip revision fails the check. This ensures the chip used will have some modifications (features, or bugfixes). The complied binary will only support chips above this revision, this will also help to reduce binary size. config ESP32C3_REV_MIN_0 bool "Rev v0.0 (ECO0)" config ESP32C3_REV_MIN_1 bool "Rev v0.1 (ECO1)" config ESP32C3_REV_MIN_2 bool "Rev v0.2 (ECO2)" config ESP32C3_REV_MIN_3 bool "Rev v0.3 (ECO3)" config ESP32C3_REV_MIN_4 bool "Rev v0.4 (ECO4)" endchoice config ESP32C3_REV_MIN # we keep it for compatibility. Use ESP32C3_REV_MIN_FULL instead. int default 0 if ESP32C3_REV_MIN_0 default 1 if ESP32C3_REV_MIN_1 default 2 if ESP32C3_REV_MIN_2 default 3 if ESP32C3_REV_MIN_3 default 4 if ESP32C3_REV_MIN_4 config ESP32C3_REV_MIN_FULL int default 0 if ESP32C3_REV_MIN_0 default 1 if ESP32C3_REV_MIN_1 default 2 if ESP32C3_REV_MIN_2 default 3 if ESP32C3_REV_MIN_3 default 4 if ESP32C3_REV_MIN_4 config ESP_REV_MIN_FULL int default ESP32C3_REV_MIN_FULL # # MAX Revision # choice ESP32C3_REV_MAX_FULL_STR prompt "Maximum Supported ESP32-C3 Revision" config ESP32C3_REV_MAX_FULL_STR_OPT bool "Rev v0.99" endchoice # Maximum revision that IDF supports. # It can not be changed by user. # Only Espressif can change it when a new version will be supported in IDF. # Supports all chips starting from ESP32C3_REV_MIN_FULL to ESP32C3_REV_MAX_FULL config ESP32C3_REV_MAX_FULL int default 99 # keep in sync the "Maximum Supported Revision" description with this value config ESP_REV_MAX_FULL int default ESP32C3_REV_MAX_FULL choice ESP32C3_UNIVERSAL_MAC_ADDRESSES bool "Number of universally administered (by IEEE) MAC address" default ESP32C3_UNIVERSAL_MAC_ADDRESSES_FOUR help Configure the number of universally administered (by IEEE) MAC addresses. During initialization, MAC addresses for each network interface are generated or derived from a single base MAC address. If the number of universal MAC addresses is four, all four interfaces (WiFi station, WiFi softap, Bluetooth and Ethernet) receive a universally administered MAC address. These are generated sequentially by adding 0, 1, 2 and 3 (respectively) to the final octet of the base MAC address. If the number of universal MAC addresses is two, only two interfaces (WiFi station and Bluetooth) receive a universally administered MAC address. These are generated sequentially by adding 0 and 1 (respectively) to the base MAC address. The remaining two interfaces (WiFi softap and Ethernet) receive local MAC addresses. These are derived from the universal WiFi station and Bluetooth MAC addresses, respectively. When using the default (Espressif-assigned) base MAC address, either setting can be used. When using a custom universal MAC address range, the correct setting will depend on the allocation of MAC addresses in this range (either 2 or 4 per device.) Note that ESP32-C3 has no integrated Ethernet MAC. Although it's possible to use the esp_read_mac() API to return a MAC for Ethernet, this can only be used with an external MAC peripheral. config ESP32C3_UNIVERSAL_MAC_ADDRESSES_TWO bool "Two" select ESP_MAC_ADDR_UNIVERSE_WIFI_STA select ESP_MAC_ADDR_UNIVERSE_BT config ESP32C3_UNIVERSAL_MAC_ADDRESSES_FOUR bool "Four" select ESP_MAC_ADDR_UNIVERSE_WIFI_STA select ESP_MAC_ADDR_UNIVERSE_WIFI_AP select ESP_MAC_ADDR_UNIVERSE_BT select ESP_MAC_ADDR_UNIVERSE_ETH endchoice config ESP32C3_UNIVERSAL_MAC_ADDRESSES int default 2 if ESP32C3_UNIVERSAL_MAC_ADDRESSES_TWO default 4 if ESP32C3_UNIVERSAL_MAC_ADDRESSES_FOUR config ESP32C3_DEBUG_OCDAWARE bool "Make exception and panic handlers JTAG/OCD aware" default y select FREERTOS_DEBUG_OCDAWARE help The FreeRTOS panic and unhandled exception handers can detect a JTAG OCD debugger and instead of panicking, have the debugger stop on the offending instruction. config ESP32C3_DEBUG_STUBS_ENABLE bool "OpenOCD debug stubs" default COMPILER_OPTIMIZATION_LEVEL_DEBUG depends on !ESP32C3_TRAX help Debug stubs are used by OpenOCD to execute pre-compiled onboard code which does some useful debugging, e.g. GCOV data dump. config ESP32C3_BROWNOUT_DET bool "Hardware brownout detect & reset" default y help The ESP32-C3 has a built-in brownout detector which can detect if the voltage is lower than a specific value. If this happens, it will reset the chip in order to prevent unintended behaviour. choice ESP32C3_BROWNOUT_DET_LVL_SEL prompt "Brownout voltage level" depends on ESP32C3_BROWNOUT_DET default ESP32C3_BROWNOUT_DET_LVL_SEL_7 help The brownout detector will reset the chip when the supply voltage is approximately below this level. Note that there may be some variation of brownout voltage level between each chip. #The voltage levels here are estimates, more work needs to be done to figure out the exact voltages #of the brownout threshold levels. config ESP32C3_BROWNOUT_DET_LVL_SEL_7 bool "2.51V" config ESP32C3_BROWNOUT_DET_LVL_SEL_6 bool "2.64V" config ESP32C3_BROWNOUT_DET_LVL_SEL_5 bool "2.76V" config ESP32C3_BROWNOUT_DET_LVL_SEL_4 bool "2.92V" config ESP32C3_BROWNOUT_DET_LVL_SEL_3 bool "3.10V" config ESP32C3_BROWNOUT_DET_LVL_SEL_2 bool "3.27V" endchoice config ESP32C3_BROWNOUT_DET_LVL int default 2 if ESP32C3_BROWNOUT_DET_LVL_SEL_2 default 3 if ESP32C3_BROWNOUT_DET_LVL_SEL_3 default 4 if ESP32C3_BROWNOUT_DET_LVL_SEL_4 default 5 if ESP32C3_BROWNOUT_DET_LVL_SEL_5 default 6 if ESP32C3_BROWNOUT_DET_LVL_SEL_6 default 7 if ESP32C3_BROWNOUT_DET_LVL_SEL_7 choice ESP32C3_TIME_SYSCALL prompt "Timers used for gettimeofday function" default ESP32C3_TIME_SYSCALL_USE_RTC_SYSTIMER help This setting defines which hardware timers are used to implement 'gettimeofday' and 'time' functions in C library. - If both high-resolution (systimer) and RTC timers are used, timekeeping will continue in deep sleep. Time will be reported at 1 microsecond resolution. This is the default, and the recommended option. - If only high-resolution timer (systimer) is used, gettimeofday will provide time at microsecond resolution. Time will not be preserved when going into deep sleep mode. - If only RTC timer is used, timekeeping will continue in deep sleep, but time will be measured at 6.(6) microsecond resolution. Also the gettimeofday function itself may take longer to run. - If no timers are used, gettimeofday and time functions return -1 and set errno to ENOSYS. - When RTC is used for timekeeping, two RTC_STORE registers are used to keep time in deep sleep mode. config ESP32C3_TIME_SYSCALL_USE_RTC_SYSTIMER bool "RTC and high-resolution timer" select ESP_TIME_FUNCS_USE_RTC_TIMER select ESP_TIME_FUNCS_USE_ESP_TIMER config ESP32C3_TIME_SYSCALL_USE_RTC bool "RTC" select ESP_TIME_FUNCS_USE_RTC_TIMER config ESP32C3_TIME_SYSCALL_USE_SYSTIMER bool "High-resolution timer" select ESP_TIME_FUNCS_USE_ESP_TIMER config ESP32C3_TIME_SYSCALL_USE_NONE bool "None" select ESP_TIME_FUNCS_USE_NONE endchoice choice ESP32C3_RTC_CLK_SRC prompt "RTC clock source" default ESP32C3_RTC_CLK_SRC_INT_RC help Choose which clock is used as RTC clock source. config ESP32C3_RTC_CLK_SRC_INT_RC bool "Internal 150kHz RC oscillator" config ESP32C3_RTC_CLK_SRC_EXT_CRYS bool "External 32kHz crystal" select ESP_SYSTEM_RTC_EXT_XTAL config ESP32C3_RTC_CLK_SRC_EXT_OSC bool "External 32kHz oscillator at 32K_XP pin" config ESP32C3_RTC_CLK_SRC_INT_8MD256 bool "Internal 8MHz oscillator, divided by 256 (~32kHz)" endchoice config ESP32C3_RTC_CLK_CAL_CYCLES int "Number of cycles for RTC_SLOW_CLK calibration" default 3000 if ESP32C3_RTC_CLK_SRC_EXT_CRYS || ESP32C3_RTC_CLK_SRC_EXT_OSC || ESP32C3_RTC_CLK_SRC_INT_8MD256 default 1024 if ESP32C3_RTC_CLK_SRC_INT_RC range 0 125000 help When the startup code initializes RTC_SLOW_CLK, it can perform calibration by comparing the RTC_SLOW_CLK frequency with main XTAL frequency. This option sets the number of RTC_SLOW_CLK cycles measured by the calibration routine. Higher numbers increase calibration precision, which may be important for applications which spend a lot of time in deep sleep. Lower numbers reduce startup time. When this option is set to 0, clock calibration will not be performed at startup, and approximate clock frequencies will be assumed: - 150000 Hz if internal RC oscillator is used as clock source. For this use value 1024. - 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more. In case more value will help improve the definition of the launch of the crystal. If the crystal could not start, it will be switched to internal RC. config ESP32C3_NO_BLOBS bool "No Binary Blobs" depends on !BT_ENABLED default n help If enabled, this disables the linking of binary libraries in the application build. Note that after enabling this Wi-Fi/Bluetooth will not work. config ESP32C3_LIGHTSLEEP_GPIO_RESET_WORKAROUND bool "light sleep GPIO reset workaround" default y select PM_SLP_DISABLE_GPIO if FREERTOS_USE_TICKLESS_IDLE help ESP32C3 will reset at wake-up if GPIO is received a small electrostatic pulse during light sleep, with specific condition - GPIO needs to be configured as input-mode only - The pin receives a small electrostatic pulse, and reset occurs when the pulse voltage is higher than 6 V For GPIO set to input mode only, it is not a good practice to leave it open/floating, The hardware design needs to controlled it with determined supply or ground voltage is necessary. This option provides a software workaround for this issue. Configure to isolate all GPIO pins in sleep state. endmenu # ESP32C3-Specific