alex/esp-idf
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14,871 Commits 20 Branches 148 Tags 384 MiB
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43 Commits

Author SHA1 Message Date
Michael (XIAO Xufeng)
4b95f7efa8 Merge branch 'feature/spi_dma_hal_ll_refactor' into 'master' 
spi: refactor DMA ll layer functions

Closes IDFGH-3538 and IDFGH-2555

See merge request espressif/esp-idf!9929
 2020-09-23 15:32:41 +08:00
morris
61f89b97c6 bringup esp32-s3 on FPGA 2020-09-22 15:15:03 +08:00
Armando
59e350b195 spi: seperate the pointer for the TX and RX DMA 2020-09-21 20:33:56 +08:00
morris
2917651478 esp_rom: extract common ets apis into esp_rom_sys.h 2020-07-27 15:27:01 +08:00
morris
a4d0033c03 esp_rom: extract common GPIO apis into esp_rom_gpio.h 2020-07-07 11:40:19 +08:00
Michael (XIAO Xufeng)
49a48644e4 spi: allow using esp_flash and spi_master driver on the same bus 2020-03-26 22:08:26 +08:00
Michael (XIAO Xufeng)
7026087dc0 spi: support esp32s2 2020-01-26 17:24:12 +08:00
morris
e30cd361a8 global: rename esp32s2beta to esp32s2 2020-01-22 12:14:38 +08:00
Andrew
1669dc40d1 spi_slave.c:fix DMA channel set to zero which might gets conflict with assert 
close #2740
 2019-11-26 13:11:48 +08:00
Angus Gratton
496ede9bcd Merge branch 'master' into feature/esp32s2beta_merge 2019-10-15 14:59:27 +11:00
Michael (XIAO Xufeng)
afbe1ba878 spi: move deprecated functions into internal header 
Resolves https://github.com/espressif/esp-idf/issues/4132
 2019-10-08 11:51:39 +08:00
Angus Gratton
24d26fccde Merge branch 'master' into feature/esp32s2beta_update 2019-08-08 13:44:24 +10:00
Michael (XIAO Xufeng)
17378fd4c2 spi: support new chip esp32s2beta 2019-06-23 12:17:27 +08:00
Michael (XIAO Xufeng)
9b13a04abf spi: multichip support 
move hardcoded numbers, etc. into soc files.
create headers for shared types which needs to be documented.

(MINOR CHANGE)
 2019-06-22 19:08:47 +08:00
Angus Gratton
90008e3fd6 Merge branch 'feature/spi_driver_support_multi_chip' into 'master' 
spi: multichip support

See merge request idf/esp-idf!5234
 2019-06-20 16:45:06 +08:00
Michael (XIAO Xufeng)
5c9dc44c49 spi: multichip support 
move hardcoded numbers, etc. into soc files.
create headers for shared types which needs to be documented.

(MINOR CHANGE)
 2019-06-20 10:38:52 +08:00
Michael (XIAO Xufeng)
1138133a78 spi: fix a possible concurrency issue 2019-06-17 00:16:01 +00:00
suda-morris
84b2f9f14d build and link hello-world for esp32s2beta 2019-06-11 13:07:37 +08:00
Konstantin Kondrashov
399d2d2605 all: Using xxx_periph.h 
Using xxx_periph.h in whole IDF instead of xxx_reg.h, xxx_struct.h, xxx_channel.h ... .

Cleaned up header files from unnecessary headers (releated to soc/... headers).
 2019-06-03 14:15:08 +08:00
Michael (XIAO Xufeng)
33db6d608e spi_slave: add HAL support 2019-05-20 07:34:34 +00:00
morris
f5b03c9ea3 misc adjustment of esp32 component 2019-04-03 19:57:46 +08:00
morris
c159984264 separate rom from esp32 component to esp_rom 
1. separate rom include files and linkscript to esp_rom
2. modefiy "include rom/xxx.h" to "include esp32/rom/xxx.h"
3. Forward compatible
4. update mqtt
 2019-03-21 18:51:45 +08:00
michael
58955a79a2 spi_slave: improve the timing configuration 
SPI Slave
===========

- Correct the configuration of mode 0~3 using new config in the TRM
- Split the workaround for DMA in mode 0/2 out of normal config, to make it clear.
- Update timing and speed document for the SPI slave.

Resolves https://github.com/espressif/esp-idf/issues/1346, https://github.com/espressif/esp-idf/issues/2393
 2019-01-26 00:10:41 +08:00
michael
cfba157fdd spi_slave: add valid check for DMA buffers 
The DMA cannot receive data correctly when the buffer address is not
WORD aligned. Currently we only check whether the buffer is in the DRAM
region.

The DMA always write in WORDs, so the length arguments should also be
multiples of 32 bits.

A check is added to see whether the buffer is WORD aligned and has valid
length.
 2018-11-26 03:49:26 +00:00
Michael (XIAO Xufeng)
8cddfa35b8 spi: fix the crash when callbacks are not in the IRAM 
Introduced in 9c23b8e5 and 4f87a62f. To get higher speed, menuconfig
options are added to put ISR and other functions into the IRAM.  The
interrupt flag ESP_INTR_FLAG_IRAM is also mistakenly set when the ISR is
put into the IRAM. However callbacks, which are wrote by the user, are
called in the master and slave ISR. The user may not be aware of that
these callbacks are not disabled during flash operations. Any cache miss
during flash operation will cause panic.

Essentially IRAM functions and intrrupt flag ESP_INTR_FLAG_IRAM are
different, the latter means not disabling the ISR during flash
operations.  New bus_config flag intr_flags is offered to help set the
interrupt attribute, including priority level, SHARED, IRAM (not
disabled during flash operations).  It introduced a small BREAK to
IDFv3.1 (but the same as IDFv3.0) that the user has to manually set IRAM
flag now (therefore he's aware of the IRAM thing) to void the ISR being
disabled during flash operations.
 2018-11-20 13:07:13 +08:00
Michael (XIAO Xufeng)
9b5d0f3322 spi: shown owner of spi host explicitly 2018-10-29 20:22:44 +08:00
Michael (XIAO Xufeng)
90d229eb6d spi_master: speed up polling performance by putting into IRAM 2018-10-25 12:31:45 +08:00
michael
e5ed450d95 spi: move gpio direction config to common func for coinsistence 
(MINOR CHANGE)
 2018-10-04 14:57:31 +08:00
michael
2d748b5d38 spi_slave: fix the issue rx dma get broken by master unexpected transaction 2018-09-07 12:04:55 +08:00
Michael (XIAO Xufeng)
4f87a62f18 spi_slave: add new menuconfig item to decide whether spi slave should be put into IRAM 2018-08-23 05:21:49 +00:00
Michael (XIAO Xufeng)
ebfda40b7c refactor(spi): move pin information into soc folder 2018-06-14 11:29:15 +08:00
Michael (Xiao Xufeng)
45f8bcf3f8 fix(spi): allow using MISO on GPIO34-39 
Breaking Changes: arguments of ``spicommon_bus_initialize_io`` are changed.

Closes https://github.com/espressif/esp-idf/issues/1736.
 2018-04-12 17:01:38 +08:00
Michael (Xiao Xufeng)
77629129c0 chore(spi): update the return value of spi init functions 2018-04-12 17:01:38 +08:00
michael
842292523f fix(spi_slave): add interrupt free into bus free process. 2017-11-17 12:14:40 +08:00
Ivan Grokhotkov
5048d38ce7 spi slave: lock APB frequency while driver is in use 2017-10-18 14:37:21 +08:00
Gabriel Carstoiu
8128bb95ef fix(spi_slave): enable DMA clock when initialization. 
merging in the code updates to the SPI master code done in commit b834fcf78a.

TW#15670, Closes #1027
 2017-10-17 12:20:40 +08:00
michael
8e31a36562 feat(spi_slave): append trans_len field in trans_desc to show length actually transferred. 2017-10-17 12:01:12 +08:00
Angus Gratton
8d7074ed5c soc: Move esp_ptr_dma_capable() function to soc_memory_layout.h 2017-07-10 17:46:03 +08:00
Angus Gratton
71c70cb15c heap: Refactor heap regions/capabilities out of FreeRTOS 
Remove tagged heap API, rename caps_xxx to heap_caps_xxx

Also includes additional heap_caps_xxx inspection functions.
 2017-07-10 17:46:03 +08:00
Jeroen Domburg
8af3fe4e84 Warn against and check for non-DMA-capable pointers being passed to SPI when DMA is used 2017-05-05 12:28:03 +08:00
Jeroen Domburg
04b901e629 SPI: More MR issues fixed, style fixup 2017-04-27 11:49:04 +08:00
Jeroen Domburg
4c06dca15c SPI: Small fixes according to MR comments 2017-04-27 11:49:04 +08:00
Jeroen Domburg
e9c372bc2d SPI: Split common SPI stuff out of master driver; add slave driver; add workaround for DMA issue. 2017-04-27 11:49:04 +08:00