Commit Graph

9 Commits

Author SHA1 Message Date
Gustavo Henrique Nihei
2bc4a0836f spi: Remove Slave TX/RX set bitlen not effective for ESP32-S2/C3/S3
Furthermore, RX_EOF_EN should only be set when SPI Slave is configured
for segment transfer mode and the "ms_data_bitlen" field is configured
to control the "IN_SUC_EOF" interrupt. Since "ms_data_bitlen" is not
set anymore for S2, C3 and S3, "RX_EOF_EN" should be cleared.
2021-11-25 12:03:54 +08:00
Gustavo Henrique Nihei
74f010ddfd spi_slave: Fix MOSI/MISO enable on transaction preparation
MOSI and MISO enablement were conditioned to the existence of TX
and RX buffers, respectively. This is valid for the SPI Master,
but for the SPI Slave the opposite is expected.
2021-11-25 12:03:54 +08:00
Armando
ffc4ff5a8c spi: apply gdma allocator to SPI 2021-02-25 11:01:16 +08:00
Angus Gratton
7c08be5771 hal: Add initial ESP32-C3 support
From internal commit 7761d6e8
2020-11-30 15:23:15 +11:00
Angus Gratton
66fb5a29bb Whitespace: Automated whitespace fixes (large commit)
Apply the pre-commit hook whitespace fixes to all files in the repo.

(Line endings, blank lines at end of file, trailing whitespace)
2020-11-11 07:36:35 +00:00
Armando
f7e91ef6c1 spi: esp32s3 bringup for spi 2020-10-26 11:28:34 +08:00
Armando
1e1beb69aa spi: fix build fail issue when target is esp32s3 2020-09-24 10:51:23 +08:00
Armando
59e350b195 spi: seperate the pointer for the TX and RX DMA 2020-09-21 20:33:56 +08:00
Michael (XIAO Xufeng)
5425ef4ee4 hal: extract hal component from soc component 2020-09-01 13:25:32 +08:00