Commit Graph

7 Commits

Author SHA1 Message Date
Marius Vikhammer
fa62dfd5f9 CI: disable performance check for PSRAM config
The cache compensated timer performance check ocasionally
wrong result for psram_2 config. Disabled CI test for now.
2021-03-22 11:39:49 +08:00
Ivan Grokhotkov
455dbf28f4 esp32: use ccomp_timer in SHA test 2020-03-27 20:07:02 +07:00
Marius Vikhammer
c63684cf6c hw crypto: activated hardware acceleration for esp32s2beta
Activated AES, RSA and SHA hardware acceleration for esp32s2 and enabled related unit tests.

Updated with changes made for ESP32 from 0a04034, 961f59f and caea288.

Added performance targets for esp32s2beta

Closes IDF-757
2019-12-12 12:37:29 +08:00
morris
709a320f33 move hwcrypto from esp32 to mbedtls 2019-03-26 16:24:22 +08:00
morris
956c25dedd move esp32 chip specific includes to esp32/xxx.h 2019-03-18 17:14:05 +08:00
Angus Gratton
12bdf8e45b esp32: Chunk input blocks for esp_sha() function performance, add perf test 2019-03-14 05:56:06 +00:00
Angus Gratton
6a6fbde83d esp32 hwcrypto: Prevent esp_sha() from disabling interrupts for extended period
* Closes https://github.com/espressif/esp-idf/issues/3127
* Closes IDFGH-681

Also reported at https://esp32.com/viewtopic.php?f=13&t=9506
2019-03-14 05:56:06 +00:00