Commit Graph

221 Commits

Author SHA1 Message Date
Darian Leung
f9a51fc784 can: Add support for lower bit rates
This commit adds support for lower bit rates in the CAN Driver for
ESP32 Rev 2 or later chips.
2019-10-28 13:10:00 +08:00
suda-morris
b482ba117d efuse: update the scheme of getting chip revision 2019-08-13 15:49:01 +08:00
Angus Gratton
e5672e5d7f efuse/flash encryption: Reduce FLASH_CRYPT_CNT to a 7 bit efuse field
8th bit is not used by hardware.

As reported https://esp32.com/viewtopic.php?f=2&t=7800&p=40895#p40894
2019-04-09 09:57:18 +10:00
Jiang Jiang Jian
7196573605 Merge branch 'bugfix/heap_caps_int_overflows_v3.3' into 'release/v3.3'
heap: Add integer overflow checks on MALLOC_CAP_32BIT & MALLOC_CAP_EXEC (v3.3)

See merge request idf/esp-idf!4570
2019-04-04 17:59:40 +08:00
maojianxin
ce3d20dcd2 Fix external start fail 2019-04-02 12:54:08 +11:00
Zhang Jun Yi
1dc461ba80 soc/rtc: Bypass touchpad current to external 32k crystal oscillator 2019-04-02 12:54:08 +11:00
Angus Gratton
f72df315f7 heap: Add integer overflow checks on MALLOC_CAP_32BIT & MALLOC_CAP_EXEC 2019-03-20 18:30:25 +11:00
Konstantin Kondrashov
d82023bf06 soc: Add support efuse 2019-02-28 07:31:29 +00:00
Ivan Grokhotkov
8cc6226051 soc: define named constants for DPORT_CPUPERIOD_SEL values 2019-02-26 17:07:59 +08:00
Ivan Grokhotkov
dda0208614 soc/rtc_clk: don’t clear DPORT_CPUPERIOD_SEL when switching to XTAL
This is not necessary since RTC_CNTL_SOC_CLK_SEL is set before this.
2019-02-26 17:02:34 +08:00
Angus Gratton
b966ef9fcd Merge branch 'bugfix/update_ledc_register_and_fix_fade_scale' into 'master'
Bugfix (ledc):  Fixed ledc fade scale  bug

See merge request idf/esp-idf!4109
2019-02-26 11:46:28 +08:00
Ivan Grokhotkov
dc133f9fc4 Revert "Merge branch 'bugfix/external_rtc_start_fail' into 'master'"
This reverts merge request !2441
2019-02-19 12:39:47 +08:00
Angus Gratton
6538acc94f Merge branch 'bugfix/wdt_compability_app_with_old_bootloader' into 'master'
esp32: Fix wdt settings in esp_restart_noos

See merge request idf/esp-idf!4098
2019-02-19 10:42:33 +08:00
maojianxin
0676941332 soc/rtc: fix RTC_TOUCH_TRIG_EN or RTC_ULP_TRIG_EN should keep RTC_PERIPH power on 2019-02-13 10:30:37 +08:00
Zhang Jun Yi
c5b4512a27 soc/rtc: Bypass touchpad current to external 32k crystal oscillator 2019-02-13 10:15:45 +08:00
Ivan Grokhotkov
2eabed161a Merge branch 'feature/merge_multiple_github_prs' into 'master'
Multiple Github PRs

See merge request idf/esp-idf!4146
2019-01-24 15:14:47 +08:00
Pieter du Preez
496bfe3842 Initialized some uninitialized variables in rtc_clk.c and ringbuf.c.
The following 2 compiler warnings are only reproducible when setting:
   OPTIMIZATION_FLAGS = -Ofast

esp-idf/components/soc/esp32/rtc_clk.c:
In function 'rtc_clk_cpu_freq_get':
esp-idf/components/soc/esp32/rtc_clk.c:506:12:
error: 'freq' may be used uninitialized in this function
[-Werror=maybe-uninitialized]
	return freq;

esp-idf/components/esp_ringbuf/ringbuf.c:
In function 'xRingbufferReceiveSplitFromISR':
esp-idf/components/esp_ringbuf/ringbuf.c:934:26:
error: 'pvTempTailItem' may be used uninitialized in this function
[-Werror=maybe-uninitialized]
	*ppvTailItem = pvTempTailItem;

Closes https://github.com/espressif/esp-idf/pull/2878
2019-01-23 16:47:23 +05:30
Wangjialin
78bea94d8a feature: add support for setting core voltage in high performance cases.
1. add definitions of EFUSE_RD_VOL_LEVEL_HP_INV in efuse_reg.h
2. modify the core voltage according to the record in efuse in high performance cases.
2019-01-22 12:13:58 +08:00
Wangjialin
d518a19d95 driver(ledc): fix ledc fade API and update the register header file
1. fix error when fading is too fast
2. fix error when setting duty and update immediately
3. update register header file to be in accord with TRM

closes https://github.com/espressif/esp-idf/issues/2903
2019-01-12 00:56:38 +08:00
Konstantin Kondrashov
82c5e648ad esp32: Fix wdt settings in esp_restart_noos
Fixed compatibility the new apps with the old bootloaders.

Closes: https://github.com/espressif/esp-idf/issues/2927
2019-01-10 20:22:26 +08:00
Ivan Grokhotkov
0cf8d1380e soc/rtc: reset another BBPLL related register
Follow-up to b21ffc8a: an additional register needs to be reset.

Ref. https://github.com/espressif/esp-idf/issues/2711
2018-12-12 12:24:48 +08:00
Ivan Grokhotkov
04c511c9b5 panic: dump some instruction memory on IllegalInstruction exception 2018-12-07 16:50:00 +08:00
Ivan Grokhotkov
b21ffc8a0c soc/rtc: reset BBPLL configuration after enabling it
A workaround to reset BBPLL configuration after light sleep. Fixes the
issue that Wi-Fi can not receive packets after waking up from light
sleep.

Ref. https://github.com/espressif/esp-idf/issues/2711
2018-12-06 14:43:24 +08:00
Angus Gratton
7f32995a4c soc: Add "#include <stdint.h>" to all register structs
Closes https://github.com/espressif/esp-idf/issues/2239

TW24912
2018-12-04 11:17:38 +11:00
kooho
da223fad4e driver(rmt): Add API get rmt channel's status.
closes https://github.com/espressif/esp-idf/issues/1175
closes https://github.com/espressif/esp-idf/issues/2599
closes https://github.com/espressif/esp-idf/issues/2452
2018-11-28 07:20:45 +00:00
Ivan Grokhotkov
964f5a91f7 bootloader, esp32: add workaround for Tensilica erratum 572
If zero-overhead loop buffer is enabled, under certain rare conditions
when executing a zero-overhead loop, the CPU may attempt to execute an invalid instruction. Work around by disabling the buffer.
2018-11-19 04:39:35 +00:00
shawwwn
288d9b75e9 rtc_clk: bugfix: incorrect divider setting in rtc_clk_cpu_freq_to_config()
Merges https://github.com/espressif/esp-idf/pull/2404
2018-11-08 15:57:10 +05:30
Konstantin Kondrashov
8bba348528 aes/sha/mpi: Bugfix a use of shared registers.
This commit resolves a blocking in esp_aes_block function.

Introduce:
The problem was in the fact that AES is switched off at the moment when he should give out the processed data. But because of the disabled, the operation can not be completed successfully, there is an infinite hang. The reason for this behavior is that the registers for controlling the inclusion of AES, SHA, MPI have shared registers and they were not protected from sharing.

Fix some related issue with shared using of AES SHA RSA accelerators.

Closes: https://github.com/espressif/esp-idf/issues/2295#issuecomment-432898137
2018-11-05 04:22:47 +00:00
Michael (XIAO Xufeng)
4132834faa test: fix the unit test fail issue under single_core config
Introduced in 97e3542947.

The previous commit frees the IRAM part when single core, but doesn't
change the memory layout functions. The unit test mallocs IRAM memory
from the heap, accidently into the new-released region, which doesn't
match the memory layout function.

This commit update the memory layout function to fix this.
2018-10-31 17:04:32 +08:00
Jiang Jiang Jian
97e3542947 Merge branch 'bugfix/release_some_memory_on_single_core_mode' into 'master'
release memory not used in single core mode

See merge request idf/esp-idf!2733
2018-10-30 15:53:31 +08:00
Michael (XIAO Xufeng)
d0361a32d7 test: fix the IRAM type conflict issue using heap_caps_malloc 2018-10-25 12:31:44 +08:00
Renz Bagaporo
cc774111bf cmake: Add support for test build 2018-10-20 12:07:24 +08:00
Ivan Grokhotkov
bd11965f6c Merge branch 'bugfix/ndebug_build' into 'master'
soc,sdmmc: fix build failures when NDEBUG is used

See merge request idf/esp-idf!3352
2018-10-19 11:55:37 +08:00
Angus Gratton
f53fef9936 Secure Boot & Flash encryption: Support 3/4 Coding Scheme
Includes esptool update to v2.6-beta1
2018-10-16 16:24:10 +11:00
Ivan Grokhotkov
a20d9287fe soc: use _EARLY versions of ESP_LOG
Some logging done in soc component may happen before logging via
stdout is possible. Use _EARLY version of log calls to make sure that
output is visible. The downside is that application does not have a
way to silence these logs. However since the soc component doesn’t
use any LOGV/LOGD/LOGI and only logs warnings and errors, this should
not impact the application.
2018-10-15 14:59:46 +08:00
Ivan Grokhotkov
ab68b9d90d soc,sdmmc: fix build failures when NDEBUG is used
Use explicit error checking instead of asserts, use SOC_LOG to print
error/warning messages where needed.
2018-10-15 14:57:12 +08:00
Ivan Grokhotkov
22b840f3df bootloader: don’t reload RTC_FAST DRAM after deep sleep
When CONFIG_ESP32_RTCDATA_IN_FAST_MEM is enabled, RTC data is placed
into RTC_FAST memory region, viewed from the data bus. However the
bootloader was missing a check that this region should not be
overwritten after deep sleep, which caused .rtc.bss segment to loose
its contents after wakeup.
2018-09-29 14:02:16 +08:00
Jack
2efd6859ed release memory not used in single core mode
1. do not start ipc task in single core mode
2. do not use APP cpu cache memory in single core mode
3. relase data used in rom by APP cpu
2018-09-25 15:13:47 +08:00
negativekelvin
8e2856b83d soc: fix CPU frequency not updated in rtc_clk_init
Add missing call to rtc_clk_cpu_freq_set_config

Merges https://github.com/espressif/esp-idf/pull/2398
2018-09-12 21:13:42 +08:00
Renz Christian Bagaporo
d9939cedd9 cmake: make main a component again 2018-09-11 09:44:12 +08:00
Konstantin Kondrashov
38098b713f esp32/sleep: Add a function to disable logging from ROM code 2018-09-04 16:03:18 +08:00
Konstantin Kondrashov
9c715d7946 bootloader_support: Fix enable rtc_wdt for resolve issue with varying supply
Eliminates the issue with the lock up in the bootloader due to a power drawdown during its operation.

Closes https://github.com/espressif/esp-idf/issues/1814
2018-09-03 05:43:01 +00:00
Ivan Grokhotkov
78fab8a0f9 sdmmc: implement partial DDR support
Works for 3.3V eMMC in 4 line mode.
Not implemented:
- DDR mode for SD cards (UHS-I) also need voltage to be switched to 1.8V.
- 8-line DDR mode for eMMC to be implemented later.
2018-08-30 13:11:54 +08:00
Mahavir Jain
f0fa66a50e rtc_wdt: fix overflow issue with setting wdt interval
Signed-off-by: Mahavir Jain <mahavir@espressif.com>
2018-08-24 18:06:39 +05:30
Ivan Grokhotkov
88d40e01b4 Merge branch 'feature/rtc_slowclk_extra_options' into 'master'
Add more RTC_SLOW_CLK options

See merge request idf/esp-idf!2984
2018-08-23 11:27:14 +08:00
Ivan Grokhotkov
902344c516 Merge branch 'bugfix/trace_mem_layout_pro_cpu' into 'master'
soc: fix trace memory region for single core mode

See merge request idf/esp-idf!3029
2018-08-22 16:51:43 +08:00
Ivan Grokhotkov
5bf3654637 soc/rtc: Force power on 8M clock if it is used to derive RTC slow clock 2018-08-22 11:33:20 +08:00
Ivan Grokhotkov
8365f0f5d2 soc/rtc: add support for external 32k oscillator
Compared to external 32k XTAL, when active oscillator is used as input,
some parameters need to be set differently.
2018-08-22 11:33:20 +08:00
Ivan Grokhotkov
e59571eece soc/rtc_clk: reduce data size by disabling CSWTCH generation
Saves about 200 bytes of DRAM at the expense of 4 bytes in IRAM.
2018-08-21 13:02:46 +08:00
Ivan Grokhotkov
db2f0f45be soc/rtc_clk: split rtc_clk_init into separate object file
rtc_clk_init and related functions don’t need to be in IRAM/DRAM.
2018-08-21 13:02:46 +08:00