alex/esp-idf
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15,824 Commits 20 Branches 148 Tags 384 MiB
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7 Commits

Author SHA1 Message Date
Marius Vikhammer
0a95151a75 unit_test: Refactor all performance tests that rely on cache compensated timer 
There is no ccomp timer on C3, which means our performance tests will start
failing again due to variance caused by cache misses.

This MR adds TEST_PERFORMANCE_CCOMP_ macro that will only fail
performance test if CCOMP timer is supported on the target
 2020-12-22 18:56:24 +11:00
Marius Vikhammer
457ce080ae AES: refactor and add HAL layer 
Refactor the AES driver and add HAL, LL and caps.

Add better support for running AES-GCM fully in hardware.
 2020-12-10 09:04:47 +00:00
Angus Gratton
66fb5a29bb Whitespace: Automated whitespace fixes (large commit) 
Apply the pre-commit hook whitespace fixes to all files in the repo.

(Line endings, blank lines at end of file, trailing whitespace)
 2020-11-11 07:36:35 +00:00
Marius Vikhammer
32fd9d6c63 s2 crypto: update perf test to use cache comp timer 
Updated S2 hardware accelerated crypto to use the cache compensated timer.

Re-enabled RSA performance test and set lower targets now that results are more stable

Closes: IDF-1174
 2020-03-23 11:30:55 +08:00
Marius Vikhammer
37369a8a57 crypto: SHA and AES accelerator bring up for S2 
Brings up, fixes and enables AES and SHA hardware acceleration.

Closes IDF-714
Closes IDF-716
 2020-03-11 15:09:45 +08:00
Marius Vikhammer
c63684cf6c hw crypto: activated hardware acceleration for esp32s2beta 
Activated AES, RSA and SHA hardware acceleration for esp32s2 and enabled related unit tests.

Updated with changes made for ESP32 from 0a04034, 961f59f and caea288.

Added performance targets for esp32s2beta

Closes IDF-757
 2019-12-12 12:37:29 +08:00
Ivan Grokhotkov
589a1f216f mbedtls: add SHA performance test 
Results with this revision:

SHA256 rate 2.599MB/sec Debug 240MHz SW
SHA256 rate 1.147MB/sec Release 80MHz SW
SHA256 rate 3.469MB/sec Release 240MHz SW
SHA256 rate 2.687MB/sec Release 240MHz SW + PSRAM workaround

SHA256 rate 9.433MB/sec Debug 240MHz HW rev1
SHA256 rate 3.727MB/sec Release 80MHz HW rev1
SHA256 rate 10.961MB/sec Release 240MHz HW rev1
SHA256 rate 9.966MB/sec Release 240MHz HW rev1 + PRAM workaround

SHA256 rate 10.974MB/sec Debug 240MHz HW rev3
SHA256 rate 4.362MB/sec Release 80MHz HW rev3
SHA256 rate 13.207MB/sec Release 240MHz HW rev3

Debug = Og, assertions enabled
Release = O2, assertions disabled
 2019-11-04 10:48:08 +01:00