introduced in e44ead5356
1. The int8M power domain config by default is PD. While LEDC is using
RTC8M as clock source, this power domain will be kept on.
But when 8MD256 is used as RTC clock source, the power domain should
also be kept on.
On ESP32, there was protection for it, but broken by commit
e44ead5356. Currently the power domain
will be forced on when LEDC is using RTC8M as clock source &&
!int8m_pd_en (user enable ESP_PDP_DOMAIN_RTC8M in lightsleep). Otherwise
the power domain will be powered off, regardless of RTC clock source.
In other words, int8M domain will be forced off (even when 8MD256
used as RTC clock source) if LEDC not using RTC8M as clock source, user
doesn't enable ESP_PDP_DOMAIN_RTC8M, or in deep sleep.
On later chips, there's no such protection, so 8MD256 could't be used as
RTC clock source in sleep modes.
This commit adds protection of 8MD256 clock to other chips. Fixes the
incorrect protection logic overriding on ESP32. Now the power domain
will be determiend by the logic below (order by priority):
1. When RTC clock source uses 8MD256, power up
2. When LEDC uses RTC8M clock source, power up
3. In deepsleep, power down
4. Otherwise determined by user config of ESP_PDP_DOMAIN_RTC8M,
power down by default. (This is preferred to have highest
priority, but it's kept as is because of current code structure.)
2. Before, after the macro `RTC_SLEEP_CONFIG_DEFAULT` decides dbias, the
protection above may force the int8m PU. This may cause the inconsistent
of dbias and the int8m PU status.
This commit lifts the logic of pd int8m/xtal fpu logic to upper layer
(sleep_modes.c).
Related: https://github.com/espressif/esp-idf/issues/8007, https://github.com/espressif/esp-idf/pull/8089
temp
The iperf version used in older version of CI docker images had the
following output format:
[ 3] 0.0-10.0 sec 1.25 MBytes 1.05 Mbits/sec 0.000 ms 0/ 892 (0%)
The newer iperf version which was recently included in the container
prints more digits after the decimal point:
[ 3] 0.0000-10.0148 sec 1.25 MBytes 1.05 Mbits/sec 0.002 ms 0/ 895 (0%)
The regular expression to match this line expected a single zero after
the decimal point, so the new format no longer matches.
The fix is to expect any number of digits in the fractional part.
`vTaskGetSnapshot` is being used in coredump module to collect diagnostic information.
It is possible that input arguments are invalid and `assert` in this situation is not
correct.
This commit modifies API signature to return pdTRUE in case of success, and pdFALSE
otherwise. Caller can verify return value and then take appropriate decision.
Console sets UART clock source to REF_TICK on ESP32 and ESP32S2 by
default, however, APB clock frequency does not change when power
management is disabled. Using APB clock source allows higher baud rates
for UART console.
Closes https://github.com/espressif/esp-idf/pull/8572
