Commit Graph

24 Commits

Author SHA1 Message Date
baohongde
a172605af4 components/bt: using high level interrupt in lc 2020-04-17 23:16:59 +08:00
baohongde
918472f641 Feature: high level interrupt(5) 2020-04-17 23:09:04 +08:00
Darian Leung
96af064209 freertos: Make backtrace work across interrupts
This commit adds the ability for backtracing to trace from the itnerrupt to the
task stack, and across nested interrupts. Test cases have also been added.
2019-01-28 14:34:26 +08:00
Ivan Grokhotkov
3f818f4862 pm: support for tracing using GPIOs 2017-10-18 14:19:18 +08:00
Ivan Grokhotkov
535695f0b9 freertos: add frequency switching hooks to ISR and idle task 2017-10-18 14:19:17 +08:00
Ivan Grokhotkov
99a4b6b2db freertos: introduce CONFIG_FREERTOS_INTERRUPT_BACKTRACE
The code in xtensa_vectors.S did not handle XT_DEBUG_BACKTRACE
consistently: #if was used in one case, and #ifdef in another. This makes
the checks consistent, and also introduces a Kconfig option to enable
backtrace.
2017-08-29 08:54:26 +08:00
Jeroen Domburg
1d748db209 Break out high-level interrupts so a component can override them 2017-07-07 12:51:33 +08:00
jack
fc130fba86 fix bug that files missing commit in MR 773 2017-05-31 19:37:39 +08:00
Tian Hao
f7e8856520 component/esp32 : fix dualcore bug
1. When dual core cpu run access DPORT register, must do protection.
2. If access DPORT register, must use DPORT_REG_READ/DPORT_REG_WRITE and DPORT_XXX register operation macro.
2017-05-08 21:53:43 +08:00
Jeroen Domburg
0b79d07d34 add detection of invalid cache access
- fix level 4 interrupt vectors to produce correct backtrace
- initialize invalid cache access interrupt on startup
- handle invalid cache access in panic handler
2017-04-13 15:27:38 +08:00
Jeroen Domburg
bb584c4333 Fix exception handler to jump to correct vector instead of crashing to the double exception vector. 2016-12-19 16:01:21 +08:00
Jeroen Domburg
fdf3db1959 Comment fix 2016-11-11 12:26:42 +08:00
Jeroen Domburg
86d8f63005 Per-CPU interrupt handlers and args 2016-11-10 17:59:46 +08:00
Ivan Grokhotkov
38c6256db9 Merge branch 'feature/wdts' into 'master'
Feature/wdts

This adds two watchdogs to  esp-idf:

- An interrupt watchdog. Kicks in if the FreeRTOS timer interupt on either the PRO_CPU or (when configured) the APP CPU isn't called for a configurable time. Panics, displaying which CPU caused the problem and the registers that may lead to the offending code.
- A task watchdog. A task has to feed it every once in a while. If not, it will print the name of the offending tasks, as well as the tasks currently running on both CPUs, and optionally panic.

Also adds a panic reason to the panic call, as well as fixes the panic code a bit.

See merge request !148
2016-10-27 17:09:35 +08:00
Ivan Grokhotkov
50bd28353d Merge branch 'master' into feature/freertos_static_buffers 2016-10-27 12:38:35 +08:00
Jeroen Domburg
7d254eb3f0 Move panic handler and gdbstub into esp32 component, clean up wdt according to merge req suggestions 2016-10-26 12:23:01 +08:00
Jeroen Domburg
89f7752cdd Make CPU1 int wdt / idle task wdt configurable, panic now properly disables other cpu, tick handler now also is called on cpu1, task wdt prints currently running tasks. 2016-10-25 18:08:55 +08:00
Jeroen Domburg
75a11589a1 Disable brown-out WDT, fix thread WDT, add panic reason indication to _xt_panic() 2016-10-25 17:05:13 +08:00
Jeroen Domburg
ae5c563080 Brownout works (in as far brownout can work...), int wdt works. 2016-10-21 19:30:29 +08:00
Jeroen Domburg
d00ef1607e Some more optimizations, mostly in involuntary task switches. Doesn not really help here, but might in other cases. 2016-10-18 10:51:08 +08:00
Jeroen Domburg
03bd5b6d22 Fix offset of coreid in tasktcb 2016-10-12 18:17:58 +08:00
Jeroen Domburg
4daa768e3c Define xcoreid offset, add warning in tcb struct wrt the need to also change that define when struct changes 2016-09-29 11:07:18 +08:00
Jeroen Domburg
b3309a03a3 Automatically pin no-cpu-affinity task to a core when FPU is used 2016-09-28 17:02:44 +08:00
Ivan Grokhotkov
bd6ea4393c Initial public version 2016-08-17 23:08:22 +08:00