fix(panic): fixed cache error being reported as illegal instruction
Closes IDF-6398, IDF-5657, IDF-7015, and IDF-6733
See merge request espressif/esp-idf!27430
This commit adds esp_backtrace_print_all_tasks() which prints the backtraces
of all tasks at runtime.
Closes https://github.com/espressif/esp-idf/issues/9708
CLoses https://github.com/espressif/esp-idf/pull/11575
[Omar Chebib: Prevent task switching while printing backtraces of tasks.]
[Omar Chebib: Ensure all task stacks are flushed from register to RAM.]
[Omar Chebib: Removed esp_task_snapshot_to_backtrace_frame() as task snapshot is private API.]
[Omar Chebib: Added test case for esp_backtrace_print_all_tasks().]
Signed-off-by: Omar Chebib <omar.chebib@espressif.com>
On riscv chips accessing cache mapped memory regions over the ibus would
result in an illegal instructions exception triggering faster than the cache
error interrupt/exception.
Added a cache error check in the panic handler, if any cache errors are active
the panic handler will now report a cache error, even if the trigger exception
was a illegal instructions.
Many places in the ESP_SYSTEM are using CONFIG_FREERTOS_UNICORE instead of CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE (GitHub PR)
Closes IDFGH-11333
See merge request espressif/esp-idf!27435
This commit deprecates the "freertos/xtensa_context.h" and "xtensa/xtensa_context.h"
include paths. Users should use "xtensa_context.h" instead.
- Replace legacy include paths
- Removed some unnecessary includes of "xtensa_api.h"
- Add warning to compatibility header
This commit deprecates the "freertos/xtensa_api.h" and "xtensa/xtensa_api.h"
include paths. Users should use "xtensa_api.h" instead.
- Replace legacy include paths
- Removed some unnecessary includes of "xtensa_api.h"
- Replaced some calls with "esp_cpu_..." equivalents
- Add warning to compatibility header
CONFIG_ESP_TIMER_ISR_AFFINITY can be equal to -1, whereas
ESP_SYSTEM_INIT_FN takes an uint16_t argument. To avoid overflow,
move the choice of init mask into source code and set the value
explicitly.
Similar to how the secondary init functions were already registered
via ESP_SYSTEM_INIT_FN, do the same for the core init functions.
This MR doesn't actually move the init functions into respective
components yet. This has to be carefully done in follow-up MRs.
Common spi functionality for sharing the SPI bus between modules is moved from esp_driver_spi to
a more fitting location in esp_hw_support (shared HW resource control).
This also allows us to decouple the spi_flash driver from esp_driver_spi, removing
esp_driver_spi and esp_ringbuf from G1 builds.
In ESP32-H2, the ECDSA peripheral by default uses the TRNG (hardware)
generated k value but it can be overridden to software supplied k.
This can happen through by overriding the `ECDSA_SOFTWARE_SET_K` bit
in the configuration register. Even though the HAL API is not exposed
for this but still it could be achieved by direct register
programming. And for this scenario, if sufficiently random k is not
supplied by the software then it could posses a security risk.
In this change, we are unconditionally programming the efuse
`ESP_EFUSE_ECDSA_FORCE_USE_HARDWARE_K` bit during startup security
checks itself. Additionally, same is ensured in the `esp_efuse_write_key`
API as well. This always enforces the hardware k mode in the ECDSA
peripheral and ensures strongest possible security.
