If esp_restart_noos() is run and the stack address points to external memory (SPIRAM)
then Cache_Read_Disable() raises up the error "Cache disabled but cached memory region accessed"
to fix this we switch stack to internal RAM before disable cache.
Added unit tests.
Closes: https://github.com/espressif/esp-idf/issues/5107
This configuration overflows DRAM size for esp32s2 and hence
resulting in CI failure. Removing this config as it does not
add any value in esp32s2 context.
Configurable option to use IRAM as byte accessible memory (in single core mode) using
load-store (non-word aligned and non-word size IRAM access specific) exception handlers.
This allows to use IRAM for use-cases where certain performance penalty
(upto 170 cpu cycles per load or store operation) is acceptable. Additional configuration
option has been provided to redirect mbedTLS specific in-out content length buffers to
IRAM (in single core mode), allows to save 20KB per TLS connection.
The workaround for PSRAM that will occupy an SPI bus is enabled only when:
1. used on 32MBit ver 0 PSRAM.
2. work at 80MHz.
The test used to only check 32MBit by the config option, but for PSRAM
on Wrover-B module seems to use a newer version of 32MBit PSRAM. So it
expects the workaround to be enabled, but actually not.
This commit split the unit test into two parts:
1. check all SPI buses are available, for all configs except psram_hspi
and psram_vspi, run on regular runners (including Wrover and Wrover-B).
a hidden option is enabled so that the compiler knows it's not building
psram_hspi or psram_vspi.
2. check the specified bus are acquired, for config psram_hspi and
psram_vspi. This only run on special runner (legacy Wrover module).
Changes:
KConfig: The option CONFIG_ESP32_RTCDATA_IN_FAST_MEM is added in Kconfig file for esp32 component.
esp32.common.ld: added support of RTC_DATA_ATTR, RTC_RODATA_ATTR data placement into appropriate segment according to Kconfig option.
esp32.ld: linker script is modified to set alias for memory segment selected by Kconfig option to place data. The segments for force placement are added for RTC_FAST_ATTR, RTC_SLOW_ATTR attributes.
esp_attr.h: added new attributes RTC_FAST_ATTR, RTC_SLOW_ATTR for force placement into fest/slow memory.
test_rtc_fast.c: Added unit test cases to check data placement into appropriate memory segment.
Updated documentation for RTC_DATA_ATTR, RTC_FAST_ATTR, RTC_SLOW_ATTR in deep_sleep_stub.rst file.
TW#18001
Closes https://github.com/espressif/esp-idf/issues/1553
