alex/esp-idf
alex/esp-idf
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23,529 Commits 20 Branches 148 Tags 384 MiB
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6 Commits

Author SHA1 Message Date
Sudeep Mohanty
a0e3d488da ulp: Added support for ULP FSM on esp32s3 and fixed bugs for esp32s2 
This commit enables ULP FSM support for esp32s3 and updates ULP FSM code
flow for other chips.
It adds C Macro support for the ULP FSM instruction set on esp32s2 and
esp32s3.
The unit tests are also updated to test ULP FSM on ep32s2 and esp32s3.
 2022-06-29 11:57:02 +08:00
Sudeep Mohanty
b72f987c5c ulp: Added ULP RISC-V support for esp32s3 
This commit adds support for ULP RISC-V for esp32s3.

Signed-off-by: Sudeep Mohanty <sudeep.mohanty@espressif.com>
 2022-06-22 13:33:14 +08:00
Angus Gratton
66fb5a29bb Whitespace: Automated whitespace fixes (large commit) 
Apply the pre-commit hook whitespace fixes to all files in the repo.

(Line endings, blank lines at end of file, trailing whitespace)
 2020-11-11 07:36:35 +00:00
Dmitry Yakovlev
0a8afd13a2 Udate instruction set documentation for Esp32 and Esp32s2. 
Sleep instruction removed from S2 instruction set.
LDx/STx instructions descritioin fix offset range to 13 bits (11 bits signed 32 bit words offset).
Remove I2C RD/WR operations from S2.
 2020-10-17 02:44:47 +08:00
morris
e30cd361a8 global: rename esp32s2beta to esp32s2 2020-01-22 12:14:38 +08:00
Angus Gratton
6b7da96d5b ulp: Add header for common ULP definitions 
Fixes problems with duplicate error codes in the two chip-specific ulp headers
 2019-09-16 16:18:53 +10:00