6 Commits

Author	SHA1	Message	Date
KonstantinKondrashov	26960f1734	efuse: Adds major and minor versions and others	2022-12-20 16:30:13 +08:00
Wu Zheng Hui	2e4784611d	efuse: update efuse name (backport v4.4)	2022-05-30 11:15:16 +08:00
Wu Zheng Hui	85651b4791	efuse: remove DIS_RTC_RAM_BOOT efuse bit	2021-09-18 14:58:43 +08:00
wuzhenghui	61b2c2d458	fix h2 efuse err address in block0	2021-09-16 20:08:59 +08:00
SalimTerryLi	874a720286	soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one ... update all struct headers to be more "standardized": - bit fields are properly wrapped with struct - bitwidth sum should be 32 within same struct, so that it's correctly padded with reserved bits - bit field should be uint32_t - typedef volatile struct xxx{} yyy;: xxx must exists. refer: https://github.com/espressif/esp-idf/pull/3199 added helper macros to force peripheral registers being accessed in 32 bitwidth added a check script into ci	2021-08-30 13:50:58 +08:00
Shu Chen	983cca8b27	esp32h2: copy driver/hal/soc components from esp32c3 ... Copy the esp32c3 code without any change: * components/driver/esp32h2 * components/esp32h2 * components/hal/esp32h2 * components/soc/esp32h2	2021-07-01 19:53:11 +08:00