This commit fixes an issue where in the ULP RISC-V I2C example causes
a spurious wakeup of the main CPU because of a Trap signal when the ULP
core does not meet the wakeup threshold values. This was due to the fact
that the RTC_CNTL_COCPU_DONE signal was being set before the
RTC_CNTL_COCPU_SHUT_RESET_EN signal which was causing the the ULP RISC-V
core to not reset properly on each cycle.
Closes https://github.com/espressif/esp-idf/issues/10301
This commit updates variousf pytest scripts to expect
"main_task: Calling app_main()" instead of "cpu_start: Starting scheduler" as
indicator of the start of an application.
esp_hw_support: Adds APIs to define user own MAC addresses without generation from the base MAC address
Closes IDFGH-5534 and IDFGH-8022
See merge request espressif/esp-idf!21036
1. Fix EXT0 wakeup pin error on ESP32: GPIO3 is not a RTC IO, change to use GPIO25.
2. Add ESP_ERROR_CHECK to explicitly show the runtime error
3. Improve example README
All the partition handling API functions and data-types were moved from the 'spi_flash' component to the new one named 'esp_partition'. See Storage 5.x migration guide for more details
Previous the console doc is moved from api-guide to api-reference, which
broken the URL as well, this commit added a redirect link to ensure the
old URL can still work.
This commit fixes a bug wherein an incorrect bit-width of 0 was being
used while reading the RTC_CNTL_LOW_POWER_ST_REG in ulp_fsm example code
while judging whether the system is ready for wakeup. The correct value
should be a bit-width of 1 to read bit#27 (RTC_CNTL_MAIN_STATE_IDLE) of
the RTC_CNTL_LOW_POWER_ST_REG register on esp32.
flash_suspend example will now test the worst case in order to be able
to detect real regression:
- shorter response time is acceptable, as the tested function may be in the cache already
- response time longer than 120us will be considered a potential regression
ESP32-C2 has a single group timer, thus it will use it for the interrupt watchdog,
which is more critical than the task watchdog. The latter is implement in
software thanks to the `esp_timer`component.
ulp: Updated ULP docs and ulp_fsm example for wakeup when SoC is not in sleep mode.
Closes IDFGH-6712 and IDFGH-3261
See merge request espressif/esp-idf!19967
This commit adds support for using the RTC I2C peripheral on the ULP
RISC-V core for esp32s2 and esp32s3. It also adds an example to demonstrate the
usage of the RTC I2C peripheral.
This commit also modifies the rtc_i2c register structure files to enable
the use of bitfields in the ULP RISC-V RTC I2C driver.
