Commit Graph

9 Commits

Author SHA1 Message Date
Ivan Grokhotkov
631f552489 sdmmc: don't use high speed mode with SD over SPI
Disabling due to limitation of SPI driver (max 26MHz for full-duplex
mode over GPIO matrix)
2017-08-25 14:33:19 +08:00
Ivan Grokhotkov
14c96838bf sdmmc: add more comments about card initialization steps 2017-08-16 18:59:04 +08:00
Ivan Grokhotkov
6baf8195ee sdmmc: add support for high speed (HS) mode
By default SD cards are initialized in default speed (DS) mode. Enabling
HS mode requires SWITCH_FUNC command to be sent twice: first time to
query if the card supports switching to HS mode, second time to perform
the switch.

This change implements SWITCH_FUNC command and adds the procedure to
switch to HS mode.
2017-08-16 18:59:04 +08:00
Ivan Grokhotkov
9253d316e7 sdmmc: implement deselecting a card
In some cases the card needs to be returned to standby mode from data
transfer mode. This is done using CMD7 command, which does not receive
any response in this case.
2017-08-16 18:59:04 +08:00
Ivan Grokhotkov
e6258ac6cb sdmmc: don’t flip word order in MMC_RSP_BITS
MMC_RSP_BITS helper function had a hack that it flipped word order in
the response, assuming that response size is 4 words. This hack does not
work for responses which are not 4 words long (such as the SWITCH_FUNC
response, which is 64 words long).

This change removes the hack and the matching word order reversal code
in sdmmc driver.
2017-08-16 18:59:04 +08:00
Ivan Grokhotkov
512898edee sdmmc: fix reads/writes to/from unaligned buffers
SDMMC hardware treats all buffers as aligned, and ignores 2 LSBs of
addresses written into DMA descriptors. Previously SDMMC host driver
assumed that data buffers passed from SDDMC command layer would be
aligned. However alignment checks were never implemented in the command
layer, as were the checks that the buffer coming from the application
would be in DMA capable memory. Most of the time this was indeed true.
However in some cases FATFS library can pass buffers offset by 2 bytes
from word boundary. “DMA capable” restriction may be broken if pSRAM
support is used.

This change adds buffer checks to the SDMMC host driver (alignment and
DMA capability), so that the host layer will error out for incompatible
buffers. In SDMMC command layer, a check is added to read and write
functions. If an incompatible buffer is passed from the application, new
buffer (512 bytes size) is allocated, and the transfer is performed
using {READ,WRITE}_SINGLE_BLOCK commands.
2017-08-01 03:15:11 +08:00
Ivan Grokhotkov
5f8785eaec sdmmc: add support for SPI protocol commands 2017-07-20 13:34:21 +08:00
Angus Gratton
71c70cb15c heap: Refactor heap regions/capabilities out of FreeRTOS
Remove tagged heap API, rename caps_xxx to heap_caps_xxx

Also includes additional heap_caps_xxx inspection functions.
2017-07-10 17:46:03 +08:00
Ivan Grokhotkov
edd924f273 sdmmc: add peripheral driver and protocol layer 2017-01-09 04:51:24 +08:00