Sudeep Mohanty
a0e3d488da
ulp: Added support for ULP FSM on esp32s3 and fixed bugs for esp32s2
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This commit enables ULP FSM support for esp32s3 and updates ULP FSM code
flow for other chips.
It adds C Macro support for the ULP FSM instruction set on esp32s2 and
esp32s3.
The unit tests are also updated to test ULP FSM on ep32s2 and esp32s3.
2022-06-29 11:57:02 +08:00
intern
74d745a80b
docs: update cn trans for upl docs
2022-06-29 11:56:59 +08:00
boarchuz
7e7c044afa
update ulp st doc
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Merges https://github.com/espressif/esp-idf/pull/5222
2021-04-15 16:16:11 +02:00
Angus Gratton
66fb5a29bb
Whitespace: Automated whitespace fixes (large commit)
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Apply the pre-commit hook whitespace fixes to all files in the repo.
(Line endings, blank lines at end of file, trailing whitespace)
2020-11-11 07:36:35 +00:00
boarchuz
137bc6658c
ulp: typo fix
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rd_reg comment references incorrect OPCODE ("OPCODE_WR_REG"); amended to "OPCODE_RD_REG".
Merges https://github.com/espressif/esp-idf/pull/4098
2020-09-10 01:33:50 +02:00
He Hui Zi
dfa59e3d22
docs: translate api-guides/ulp-risc-v from EN to CN
2020-08-13 19:44:46 +08:00
Felipe Neves
b6dba84323
ulp: added support to building code for riscv ULP coprocessor
2020-07-15 15:28:49 -03:00
morris
1c2cc5430e
global: bring up esp32s2(not beta)
2020-01-16 17:41:31 +08:00
