Commit Graph

482 Commits

Author SHA1 Message Date
Ivan Grokhotkov
7acda7b8eb Merge branch 'bugfix/panic_instr_fetch_prohibited' into 'master'
panic: don't interrupt the backtrace for InstrFetchProhibited exceptions

See merge request espressif/esp-idf!9851
2020-08-07 21:43:35 +08:00
Ivan Grokhotkov
600665a563 Merge branch 'bugfix/esp32s2_o2_op' into 'master'
freertos: fix build error at -O2 optimization level

Closes IDFGH-3581

See merge request espressif/esp-idf!9444
2020-08-05 22:03:00 +08:00
Ivan Grokhotkov
4e7e8598f3 freertos: ensure the interrupt stack is aligned
CONFIG_FREERTOS_ISR_STACKSIZE was set to 2100 when ELF core dump was
enabled, which resulted in a non-16-byte-aligned interrupt stack
offset. This triggered "is SP corrupted" check in the backtrace,
terminating the backtrace early.

Fix the default value, and make sure that the stack is always aligned,
regardless of the value of CONFIG_FREERTOS_ISR_STACKSIZE.
2020-08-05 12:51:41 +02:00
Angus Gratton
75402afcae Merge branch 'feature/esp32s3_clk_memory_layout' into 'master'
esp32s3: memory layout

See merge request espressif/esp-idf!9753
2020-07-29 13:48:25 +08:00
morris
2917651478 esp_rom: extract common ets apis into esp_rom_sys.h 2020-07-27 15:27:01 +08:00
morris
19761e3113 esp32s3: clk, memory layout 2020-07-27 13:05:22 +08:00
Ivan Grokhotkov
39bdbd7e33 freertos: fix compilation warning at -O2 level
Closes https://github.com/espressif/esp-idf/issues/5525
2020-07-15 12:50:51 +00:00
Ivan Grokhotkov
8e6d450a8c Revert "Merge branch 'feature/gdb_stub_task_state' into 'master'"
This reverts commit c41a0c1907, reversing
changes made to 5c1d317766.
2020-07-09 17:16:47 +02:00
Ivan Grokhotkov
4cdc5edb4e Revert "freertos, soc: don't lower INTLEVEL when entering critical sections"
This reverts commit 614a580bbb.
2020-07-09 17:15:54 +02:00
Renz Bagaporo
98dc1b0188 esp_system: introduce intermediary function to call after system init
This MR uses an intermediary function `start_app` to call after system
initialization instead of `app_main`.

In RTOS builds, freertos provides `start_app` and calls `app_main`.
In non-RTOS builds, user provides `start_app` directly.
2020-06-19 18:40:10 +10:00
Renz Bagaporo
08cbfa6187 esp_system: fix various review issues 2020-06-19 18:40:10 +10:00
Renz Bagaporo
5e59b4a812 freertos: mark port_xSchedulerRunning as volatile 2020-06-19 18:40:10 +10:00
Renz Christian Bagaporo
67983d5c1c esp_system: restore order of some init functions 2020-06-19 18:40:10 +10:00
Renz Christian Bagaporo
ef2a44d251 esp_system: introduce single core mode proxy config 2020-06-19 18:40:10 +10:00
Renz Christian Bagaporo
c53ad56515 esp_system: startup flow modifications
Changes the startup flow to the ff:

hardware -> core libraries init  -> other libraries init -> os
init (optional) -> app_main

- hardware init resides in the port layer, and is the entry point

- core libraries init executes init functions of core components

- other libraries init executes init functions of other components (weak
references)

- after other lib is init, the app_main function is called, however,

 an OS can wrap the real call to app_main to init its own stuff, and
 *then* call the real app_main
2020-06-19 18:40:09 +10:00
Renz Bagaporo
bb5535ca5d esp32, esp32s2: move startup code into esp_system 2020-06-19 18:40:09 +10:00
Ivan Grokhotkov
f4ea9d4cea freertos: increase configMINIMAL_STACK_SIZE when building with -O0
FreeRTOS scheduler uses additional stack space, as in some functions
variables are placed onto the stack instead of registers.

This issue resulted in occasional stack overflows in dport task, when
compiling at -O0 optimization level.

- Increase the configMINIMAL_STACK_SIZE to 1kB.
- Enable the watchpoint at the end of stack in CI startup test for
  this optimization level.
2020-06-02 18:51:16 +02:00
Ivan Grokhotkov
614a580bbb freertos, soc: don't lower INTLEVEL when entering critical sections
This fixes the issue where XTOS_SET_INTLEVEL would lower INTLEVEL from
4 to 3, when eTaskGetState is invoked during the core dump, triggered
from the interrupt watchdog.
2020-06-02 15:42:24 +02:00
Darian Leung
11d96b39d0 esp_ipc: Move to new component
This commit moves esp_ipc into a separate component.
2020-05-18 16:51:45 +08:00
Dmytro
ecbfe0f406 Fix usage example in xSemaphoreCreateBinaryStatic 2020-05-14 18:57:48 +08:00
Alexey Gerenkov
c91ed2b917 coredump: Increases FreeRTOS ISR stack for ELF data format 2020-05-06 20:07:30 +03:00
Angus Gratton
c41a0c1907 Merge branch 'feature/gdb_stub_task_state' into 'master'
feature/gdb_stub: make task state available on info thread command when in gdb stub.

Closes IDF-720

See merge request espressif/esp-idf!8371
2020-04-29 13:21:31 +08:00
Felipe Neves
c296d01737 gdbstub: added cpu id of running tasks to the output 2020-04-27 14:41:55 +00:00
Felipe Neves
5279e68146 gdbstub: improve format of info thread command output
gdbstub: simplify the state handling on extra thread info
2020-04-27 14:41:55 +00:00
Felipe Neves
140c5e0677 freertos: added task state field inside of TaskSnapshot_t to capture it. 2020-04-27 14:41:55 +00:00
Felipe Neves
5847e0afd2 freertos/test: fix overflow on accumulator used on scheduling time test 2020-04-27 14:20:13 +00:00
Michael (XIAO Xufeng)
9d98111652 Merge branch 'bugfix/spi_bus_lock_missing_semphrstatic' into 'master'
spi: fix config break and reduce overhead of the bus lock on SPI1

Closes IDFGH-3017

See merge request espressif/esp-idf!8221
2020-04-27 12:57:19 +08:00
morris
91e62f4e37 timer_group: update hal api && fix intr_enable
timer group interrupt enable is controled by level_int_ena instead of int_ena

Closes https://github.com/espressif/esp-idf/issues/5103
2020-04-23 19:29:15 +08:00
michael
1ca25688a8 freertos: place xQueueGenericCreateStatic into flash
`xQueueGenericCreateStatic` is placed into flash by the linker script to
reduce IRAM usage.  This will also cause the `xRingbufferCreate` not
not callable when cache is disabled.
2020-04-22 16:06:13 +08:00
michael
fdf983e0c4 spi: fix config break and reduce overhead of the bus lock on SPI1
The SPI bus lock on SPI1 introduces two side effects:

1. The device lock for the main flash requires the
`CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION` to be selected, however this
option is disabled by default in earlier IDF versions. Some developers
may find their project cannot be built by their old sdkconfig files.

2. Usually we don't need the lock on the SPI1 bus, due to it's
restrictions. However the overhead still exists in this case, the IRAM
cost for static version of semaphore functions, and the time cost when
getting and releasing the lock.

This commit:

1. Add a CONFIG_SPI_FLASH_BYPASS_MAIN_LOCK option, which will forbid the
space cost, as well as the initialization of the main bus lock.

2. When the option is not selected, the bus lock is used, the
`CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION` will be selected explicitly.

3. Revert default value of `CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION`
to `n`.

introduced in 49a48644e4.

Closes https://github.com/espressif/esp-idf/issues/5046
2020-04-22 16:06:13 +08:00
David Cermak
2e28ab29c7 freertos: silence the static analysis warning referencing the workitem 2020-03-27 18:46:39 +01:00
Michael (XIAO Xufeng)
49a48644e4 spi: allow using esp_flash and spi_master driver on the same bus 2020-03-26 22:08:26 +08:00
Renz Bagaporo
3d0967a58a test: declare requirements and include dirs private 2020-03-23 10:58:50 +08:00
Renz Christian Bagaporo
2b100789b7 esp32, esp32s2: move panic handling code to new component 2020-03-10 19:56:24 +08:00
Renz Christian Bagaporo
db608736fb freertos: implement get core id with cpu abstraction 2020-02-27 07:14:21 +05:00
Sachin Parekh
301dacfb33 Exception handlers for LoadStoreError and LoadStoreAlignmentError
Configurable option to use IRAM as byte accessible memory (in single core mode) using
load-store (non-word aligned and non-word size IRAM access specific) exception handlers.
This allows to use IRAM for use-cases where certain performance penalty
(upto 170 cpu cycles per load or store operation) is acceptable. Additional configuration
option has been provided to redirect mbedTLS specific in-out content length buffers to
IRAM (in single core mode), allows to save 20KB per TLS connection.
2020-02-26 20:21:59 +08:00
Felipe Neves
9c8289b0d9 shared_stack: using watchpoint 1 to monitor the shared_stack instead of watchpoint 0 2020-02-10 12:03:30 -03:00
Konstantin Kondrashov
739eb05bb9 esp32: add implementation of esp_timer based on TG0 LAC timer
Closes: IDF-979
2020-02-06 14:00:18 +08:00
Angus Gratton
86034ad049 Merge branch 'feature/freertos_fpu_isr' into 'master'
feature/fpu: Enable usage of FPU inside of a ISR

Closes IDF-100

See merge request espressif/esp-idf!7348
2020-01-30 13:38:37 +08:00
Felipe Neves
429712c6eb freertos: moved all xtensa specific files into a separated folder 2020-01-27 16:05:30 -03:00
Felipe Neves
5cbb3f05c0 freertos: Added experimental, optional FPU usage on level 1 ISR 2020-01-27 10:55:03 -03:00
Felipe Neves
670ea56df2 freertos: added fpu in isr test case 2020-01-27 10:55:03 -03:00
Ivan Grokhotkov
cbb84e8f5e esp32s2: fix THREADPTR calculation, re-enable FreeRTOS TLS tests
1. Clarify THREADPTR calculation in FreeRTOS code, explaining where
the constant 0x10 offset comes from.

2. On the ESP32-S2, .flash.rodata section had different default
alignment (8 bytes instead of 16), which resulted in different offset
of the TLS sections. Unfortunately I haven’t found a way to query
section alignment from C code, or to use a constant value to define
section alignment in the linker script. The linker scripts are
modified to force a fixed 16 byte alignment for .flash.rodata on the
ESP32 and ESP32-S2beta. Note that the base address of .flash.rodata
was already 16 byte aligned, so this has not changed the actual
memory layout of the application.

Full explanation of the calculation below.

Assume we have the TLS template section base address
(tls_section_vma), the address of a TLS variable in the template
(address), and the final relocation value (offset). The linker
calculates:
offset = address - tls_section_vma + align_up(TCB_SIZE, alignment).

At run time, the TLS section gets copied from _thread_local_start
(in .rodata) to task_thread_local_start. Let’s assume that an address
of a variable in the runtime TLS section is runtime_address.
Access to this address will happen by calculating THREADPTR + offset.
So, by a series of substitutions:

THREADPTR + offset = runtime_address THREADPTR = runtime_address - offset
THREADPTR = runtime_address - (address - tls_section_vma + align_up(TCB_SIZE, alignment)) THREADPTR = (runtime_address - address) + tls_section_vma - align_up(TCB_SIZE, alignment)

The difference between runtime_address and address is same as the
difference between task_thread_local_start and _thread_local_start.
And tls_section_vma is the address of .rodata section, i.e.
_rodata_start. So we arrive to

THREADPTR = task_thread_local_start - _thread_local_start + _rodata_start - align_up(TCB_SIZE, alignment).

The idea with TCB_SIZE being added to the THREADPTR when computing
the relocation was to let the OS save TCB pointer in the TREADPTR
register. The location of the run-time TLS section was assumed to be
immediately after the TCB, aligned to whatever the section alignment
was. However in our case the problem is that the run-time TLS section
is stored not next to the TCB, but at the top of the stack. Plus,
even if it was stored next to the TCB, the size of a FreeRTOS TCB is
not equal to 8 bytes (TCB_SIZE hardcoded in the linker). So we have
to calculate THREADPTR in a slightly obscure way, to compensate for
these differences.

Closes IDF-1239
2020-01-23 11:29:22 +01:00
morris
e30cd361a8 global: rename esp32s2beta to esp32s2 2020-01-22 12:14:38 +08:00
Felipe Neves
73592d9bc4 spin_lock: added new spinlock interface and decoupled it from RTOS
spin_lock: cleaned-up port files and removed portmux files

components/soc: decoupled compare and set operations from FreeRTOS

soc/spinlock: filled initial implementation of spinlock refactor

It will decouple the spinlocks into separated components with not depencences of freertos
an similar interface was provided focusing the readabillity and maintenance, also
naming to spinlocks were adopted. On FreeRTOS side the legacy portMUX macros
gained a form of wrapper functions that calls the spinlocks component thus
minimizing the impact on RTOS side.

This feature aims to close IDF-967

soc/spinlock: spinlocks passed on unit test, missing test corner cases

components/compare_set: added better function namings plus minor performance optimization on spinlocks

soc/spinlock: code reordering to remove ISC C90 mix error

freertos/portmacro: gor rid of critical sections multiline macros, placed inline functions instead

soc/spinlock: improved spinlock performance from internal RAM

For cases where the spinlock is executed from IRAM, there is no
need to check where the spinlock object is placed on memory,
removing this checks caused a great improvement on performance.
2020-01-22 06:20:34 +08:00
Felipe Neves
5d7564a039 freertos/Kconfig: make optimized task selection dependent on FREERTOS_UNICORE option
freertos: fix decrement loop of high priority task selection
2020-01-14 09:58:14 -03:00
Felipe Neves
2c612ec1dc components/freertos: using the optimized task selection on esp32s2beta
components/freertos: cleaned up multicore option scheduler.

components/freertos:  more cleanup and test optimization to present realistic results

components/freertos: remove unused macros of optimized task selection when multicore is used
2020-01-14 09:58:14 -03:00
Felipe Neves
77bf1ff1c0 freertos/tests: added test to evaluate scheduling time
freertos/Kconfig: fix trailing space on optimized scheduler option

freertos/tests: moved test context variables inside of test task.

The public variables used on scheduling time test now were packed into a structure allocated on  test case task stack and passed to tasks as arguments saving RAM comsumption.
2020-01-14 09:58:14 -03:00
Felipe Neves
d4c82606fb components/freertos: added and enabled the optimized task selection
FreeRTOS  have an platform dependent configuration to enable selection task in a optimized way.

Provided the platform dependent functions in order to allow the scheduler to use the optimized algorithms by telling to the port layer where to found bitscan instruction i.e. NSAU.

This closes IDF-1116

components/freertos: added option to disable the optimized scheduler
2020-01-14 09:58:14 -03:00
Angus Gratton
bdf6c00154 Merge branch 'feature/likely_unlikely' into 'master'
Adding likely unlikely macros to hot code paths

Closes IDF-284

See merge request espressif/esp-idf!6368
2020-01-10 14:05:07 +08:00