Commit Graph

133 Commits

Author SHA1 Message Date
Omar Chebib
708e3b6ec0 UART: RX interrupts are now properly restored after a flush
Added a unit test to make sure the expected behavior happens
2021-12-27 12:31:25 +08:00
Cao Sen Miao
eddc196081 esp_clk: refactor target/clk.h to private/esp_clk.h 2021-11-26 14:56:30 +08:00
morris
16677b0d3c global: make periph enable/disable APIs private
peripheral enable/disable usually should be managed by driver itself,
so make it as espressif private APIs, not recommended for user to use it
in application code.
However, if user want to re-write the driver or ports to other platform,
this is still possible by including the header in this way:
"esp_private/peripheral_ctrl.h"
2021-11-08 10:37:47 +08:00
Cao Sen Miao
a9f0a3531e ESP8684: add driver esp_pm heap support 2021-11-06 17:33:44 +08:00
Dmitry
fdb9edd8c6 Bugfix enable console RX UART for gdbstub for runtime mode only. 2021-08-24 12:19:21 +03:00
Omar Chebib
4e3f5573c4 uart: cleaner way of handling error in a critical section
Some critical sections have also been added, making the code more
symetric accross the similar functions.

Closes https://github.com/espressif/esp-idf/pull/6396
2021-08-12 10:52:16 +08:00
Luca Burelli
e41e67f2f1 uart: Add missing critical section wrappers around rx_buffered_len
The missing barriers caused uart_get_buffered_data_len() to (very rarely)
return a garbage value. When used in MicroPython, though, this caused
select() to return and a subsequent read() to stall indefinitely until
a char was actually available.

Signed-off-by: Chen Yi Qun <chenyiqun@espressif.com>

Closes https://github.com/espressif/esp-idf/issues/6397
Merges https://github.com/espressif/esp-idf/pull/6396
2021-08-12 10:52:16 +08:00
morris
dbeb4bdb84 uart: support alloc driver object in SRAM
If CONFIG_UART_ISR_IN_IRAM is on, which means user hope the uart
interrupt can still be serviced even when cache is diabled (e.g.
writing to flash). In that case, the driver should make sure to
put the all related objects into SRAM, avoid putting them in the PSRAM.

Closes https://github.com/espressif/esp-idf/issues/7044
Closes https://github.com/espressif/esp-idf/pull/7355
2021-08-06 13:37:40 +08:00
morris
62d9109eb5 uart: format driver code by astyle 2021-08-06 13:36:57 +08:00
Omar Chebib
779e7400b0 uart: uart_set_pin function will now use IOMUX whenever possible
By using IOMUX instead of GPIO Matrix for UART, it is now possible
on ESP32 boards to use the UART as a wake up source even if it is
not used as a console.
For other boards where this issue was not present, using IOMUX has
the advantage to be faster than using GPIO matrix, so a highest
baudrate can be used
2021-08-04 12:48:30 +08:00
Marius Vikhammer
baf0b7cdf5 uart: fix typo in error message
Closes https://github.com/espressif/esp-idf/issues/7360
2021-08-03 09:18:21 +08:00
Michael (XIAO Xufeng)
fbb6b1b11a Merge branch 'bugfix/fix_uart_reset_issue_on_esp32c3' into 'master'
bugfix(uart): reset uart0 core before uart apb reset

Closes IDF-3362

See merge request espressif/esp-idf!12749
2021-07-22 07:20:58 +00:00
Marius Vikhammer
a29a6ceef0 uart: update register headers and examples for S3 2021-07-22 12:05:49 +08:00
Chen Yi Qun
6317f5b481 add uart core reset in uart_module_enable() 2021-07-21 11:41:04 +08:00
Alex Lisitsyn
c801b3a182 freemodbus: fix uart_wait_tx_done() reenable tx_done interrupt
fixes the issue with uart_wait_tx_done() when the task is suspended and transmission is done right before reenable tx_done interrupt
2021-07-21 10:07:44 +08:00
SalimTerryLi
f545adbceb
i2c.c, uart.c: replace xxx_CHECK with ESP_RETURN_ON_FALSE 2021-07-09 15:13:34 +08:00
Shu Chen
205cd469e9 esp32h2: update driver/hal/soc components to support esp32h2 2021-07-01 19:53:11 +08:00
Michael (XIAO Xufeng)
38f0d52e2c Merge branch 'bugfix/uart_race_condition' into 'master'
Fix couple of UART issues

Closes IDFGH-5254

See merge request espressif/esp-idf!13631
2021-06-16 07:48:06 +00:00
Andrey Starodubtsev
614f1c175a Fix couple of UART issues
- there was a small race in `uart_pattern_link_free`:
  `rx_pattern_pos.data` was accessed for reading outside spinlock
- `uart_flush_input` enabled
  `UART_INTR_RXFIFO_FULL|UART_INTR_RXFIFO_TOUT` intr mask on exit even
  if these flags weren't set when function was called

Closes https://github.com/espressif/esp-idf/pull/7023
2021-05-26 15:07:00 +08:00
Jan Brudný
690974e32f driver: update copyright notice 2021-05-25 17:43:57 +02:00
Dmitry
7bb91f912c gdbstub component 2021-05-11 15:55:39 +03:00
Omar Chebib
cd79f3907d gpio: Disable USB JTAG when setting pins 18 and 19 as GPIOs on ESP32C3
When `DIS_USB_JTAG` eFuse is NOT burned (`False`), it is not possible
to set pins 18 and 19 as GPIOs. This commit solves this by manually
disabling USB JTAG when using pins 18 or 19.
The functions shall use `gpio_hal_iomux_func_sel` instead of
`PIN_FUNC_SELELECT`.
2021-04-08 14:01:18 +08:00
morris
753a929525 global: fix sign-compare warnings 2021-01-12 14:05:08 +08:00
Angus Gratton
5228d9f9ce esp32c3: Apply one-liner/small changes for ESP32-C3 2020-12-01 10:58:50 +11:00
Armando
05a4a8d864 uart: seperate sclk and baudrate setting 2020-11-24 19:12:52 +08:00
Armando
fb8b905539 uart: add uart support on esp32s3 2020-11-24 19:12:51 +08:00
Michael (XIAO Xufeng)
647dea9395 soc: combine xxx_caps.h into one soc_caps.h
During HAL layer refactoring and new chip bringup, we have several
caps.h for each part, to reduce the conflicts to minimum. But this is
The capabilities headers will be relataive stable once completely
written (maybe after the featues are supported by drivers).

Now ESP32 and ESP32-S2 drivers are relative stable, making it a good
time to combine all these caps.h into one soc_caps.h

This cleanup also move HAL config and pin config into separated files,
to make the responsibilities of these headers more clear. This is
helpful for the stabilities of soc_caps.h because we want to make it
public some day.
2020-10-17 16:10:15 +08:00
morris
61f89b97c6 bringup esp32-s3 on FPGA 2020-09-22 15:15:03 +08:00
Chen Yi Qun
b9a0d509a2 UART: Add return in uart_wait_tx_done
uart_wait_tx_done quit due to timeout but without return ESP_ERR_TIMEOUT.
2020-09-08 02:45:14 +00:00
Michael (XIAO Xufeng)
cef10fdfef Merge branch 'feature/uart_error_string_mod' into 'master'
uart: Improve error log description in UART rx buffer size

Closes IDFGH-3579

See merge request espressif/esp-idf!9466
2020-07-27 16:35:20 +08:00
morris
a4d0033c03 esp_rom: extract common GPIO apis into esp_rom_gpio.h 2020-07-07 11:40:19 +08:00
joncmaloney
15da32ebbb Improve error log description UART rx buffer size.
The under the error condition of rx buffer size is <=128 an error log is printed that reads uart rx buffer length error(>128). Propose an update to better describe the error condition as uart rx buffer length error(<=128).

Signed-off-by: Wu Bo Wen <wubowen@espressif.com>

Merges https://github.com/espressif/esp-idf/pull/5523
2020-07-03 11:27:33 +08:00
houwenxiang
61e3259f22 Driver(UART): fix uart_read_byte and uart_write_byte different in buffer type issue. 2020-06-10 16:22:06 +08:00
houwenxiang
46713a5275 driver(uart): fix uart module reset issue
On ESP32, due to fifo reset issue, UART2 will work incorrectly if reset the fifo of UART1(TX fifo and RX fifo). The software can workaround the RX fifo reset issue,

        while the TX fifo reset issue can not. When UART2 is used and UART1 is used as the log output port, a software reset can reproduce this issue. So we should reset the UART memory

        before the software reset to solve this problem.
2020-06-01 11:01:26 +08:00
Alex Lisitsyn
3abdd2207d freemodbus: fix long buffer failure
check master read write functions with array of registers)
fix master serial processing code and modbus controller to work with register array
modbus_master: add reading and writing of test value array (58 registers) to check failure is gone
remove parameter temporary buffer from modbus controller to allow more than 24 byte writes
driver: fix issue with TOUT feature
driver: fix uart_rx_timeout issue
driver: fix issue with rxfifo_tout_int_raw not triggered when received fifo_len = 120 byte and all bytes read out of fifo as result of rxfifo_full_int_raw
driver: add function uart_internal_set_always_rx_timeout() to always handle tout interrupt
examples: call uart_internal_set_always_rx_timeout() to handle tout interrupt correctly
examples: update examples to use tout feature
driver: reflect changes of uart_set_always_rx_timeout() function, change uart.c
driver: change conditions to trigger workaround for tout feature in uart.c
driver: change uart_set_always_rx_timeout()
freemodbus: fix tabs, remove commented code
driver: remove uart_ll_is_rx_idle()
2020-03-30 22:05:48 +08:00
Alex Lisitsyn
16e6e63694 driver: fix driver set rx timeout feature of uart
tout_thr - move calculation and masking into hal layer update driver and uart_ll (add uart_ll_set_rx_tout)
move tout calculation into uart_ll
move calculation of time out in bit time for esp32s2 into low level uart_ll.h file
move uart_hal_get_symb_len() into hal
update set_rx_timeout() to warn user about incorrect value
update HAL, LL 1
fix uart_xx_set_rx_tout() to convert symbol time into bit time
update param description
update tout calculation in LL
update uart_hal_get_max_rx_timeout_thrd() and uart_ll_get_max_rx_timeout_thrd()
2020-03-27 16:20:21 +08:00
houwenxiang
886745326e driver(UART): fix uart driver missing txfifo reset issue.
closes https://github.com/espressif/esp-idf/issues/4908
2020-03-25 01:48:46 +08:00
morris
e30cd361a8 global: rename esp32s2beta to esp32s2 2020-01-22 12:14:38 +08:00
Roland Dobai
a9c4dab4d3 VFS: Check in select() if the UART driver is installed or not
Closes https://github.com/espressif/esp-idf/issues/4627
2020-01-14 13:52:27 +01:00
kewal shah
eec8212237 add simplified API to set UART threshold values for RX FIFO full and TX FIFO empty 2019-12-16 20:26:04 +00:00
houwenxiang
e4230d11ca bugfix(UART): fix uart driver spinlock misused bug
1. fix uart driver spinlock misused bug
    2. add uart driver ut test case
    3. undo the change in light_sleep_example_main.c
2019-12-03 16:06:31 +08:00
houwenxiang
f27ae9b0e2 feature: Add uart hal support. 2019-11-26 20:01:50 +08:00
Mahavir Jain
ecf09382da uart: critical section compliant API in ISR context 2019-11-15 15:58:31 +05:30
David Cermak
2e0d6d0e6a uart: make uart_driver_install() more backward compatible, so if the interrupt handler configured to be in IRAM and not flagged in intr_alloc_flags argument, then the flag is gracefully updated rather then error return 2019-11-11 15:27:09 +00:00
Roland Dobai
2a0285fdb4 Fix VFS UART unit tests for esp32s2beta 2019-10-30 13:45:12 +00:00
Angus Gratton
496ede9bcd Merge branch 'master' into feature/esp32s2beta_merge 2019-10-15 14:59:27 +11:00
suda-morris
f94711c316 uart: add option to put ISR in IRAM 2019-10-02 16:43:02 +00:00
Angus Gratton
438d513a95 Merge branch 'master' into feature/esp32s2beta_merge 2019-09-16 16:18:48 +10:00
Angus Gratton
0c88ef3232 driver: Fix UART interrupt handle read bug 2019-09-04 10:53:25 +10:00
Angus Gratton
8d8d4a57e1 Merge branch 'bugfix/reset_periph_modules' into 'master'
driver: Add a reset before enabling if a module is off

Closes IDF-188

See merge request espressif/esp-idf!4843
2019-08-26 16:38:23 +08:00