Introduced in 9c23b8e5 and 4f87a62f. To get higher speed, menuconfig
options are added to put ISR and other functions into the IRAM. The
interrupt flag ESP_INTR_FLAG_IRAM is also mistakenly set when the ISR is
put into the IRAM. However callbacks, which are wrote by the user, are
called in the master and slave ISR. The user may not be aware of that
these callbacks are not disabled during flash operations. Any cache miss
during flash operation will cause panic.
Essentially IRAM functions and intrrupt flag ESP_INTR_FLAG_IRAM are
different, the latter means not disabling the ISR during flash
operations. New bus_config flag intr_flags is offered to help set the
interrupt attribute, including priority level, SHARED, IRAM (not
disabled during flash operations). It introduced a small BREAK to
IDFv3.1 (but the same as IDFv3.0) that the user has to manually set IRAM
flag now (therefore he's aware of the IRAM thing) to void the ISR being
disabled during flash operations.
The following commit rewrites the ESP-MESH docs. This commit includes
new diagrams and a structure approach to the mesh docs. Some mesh api references
have also been modified.
Hardware implements conditions LE, LT, GE, and conditions EQ and GT
are implemented in the assembler by emitting two JUMPS instructions
with other conditions.
The argument to ulp_run should be expressed in 32-bit words. Both the
address of ulp_entry and RTC_SLOW_MEM already are uint32_t*, so their
difference is the difference in addresses divided by sizeof(uint32_t).
Therefore the extra division by sizeof(uint32_t) is not needed.
* "git clone" command and a small version header are generated
depending on git properties.
* Add Versions page with details about each version
* Make it clear using master branch is living on the "bleeding
edge"
Since 94250e42a0, UART output is suspended when entering sleep mode
(deep or light sleep). This makes sense for light sleep, where sleep
normally takes small amount of time, and flushing the UART would add
a lot of latency. But this breaks existing behaviour for deep sleep,
where UART output was previously sent out before entering sleep mode.
Closes https://github.com/espressif/esp-idf/issues/2145
1. Move channel to the first row of the table.
2. Remove the condition of HT20/HT40 for they are determined by
secondary channel.
3. Clean up the CSI table.
This change allows readonly FATFS to be mounted without wear levelling
support. This will provide the customers a simple way to mount FATFS images
generated on host and flashed onto the chip during factory provisioning.
Since NVS encryption is not supported yet and NVS entry size is limited,
the change will provide an easy alternative for securing the provisioning data
by just marking FATFS parition as encrypted.
The old command caused was incorrect (x is “examine”, not “execute”)
and caused GDB register update only by chance. This replaces it with
“flushregs” command which purpose is exactly that — force GDB to
fetch registers from the remote.
