Angus Gratton
0dd9b899b7
periph_ctrl: Refactor to add periph_module_reset(), avoid potential race in SPI DMA workaround
...
Also refactor use of direct clock access in unit test ref_clock (probably not a real issue)
2017-10-02 17:48:16 +11:00
michael
b834fcf78a
fix(spi_master): this fix the SPI MOSI output missing bug.
2017-09-04 22:43:51 +08:00
Angus Gratton
71c70cb15c
heap: Refactor heap regions/capabilities out of FreeRTOS
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Remove tagged heap API, rename caps_xxx to heap_caps_xxx
Also includes additional heap_caps_xxx inspection functions.
2017-07-10 17:46:03 +08:00
Jiang Jiang Jian
c518325385
Merge branch 'bugfix/dualcore_dport' into 'master'
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component/esp32 : fix dualcore bug
1. When dual core cpu run access DPORT register, must do protection.
2. If access DPORT register, must use DPORT_REG_READ/DPORT_REG_WRITE and DPORT_XXX register operation macro.
See merge request !742
2017-05-10 11:27:01 +08:00
Tian Hao
26a3cb93c7
component/soc : move dport access header files to soc
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1. move dport access header files to soc
2. reduce dport register write protection. Only protect read operation
2017-05-09 18:06:00 +08:00
Tian Hao
f7e8856520
component/esp32 : fix dualcore bug
...
1. When dual core cpu run access DPORT register, must do protection.
2. If access DPORT register, must use DPORT_REG_READ/DPORT_REG_WRITE and DPORT_XXX register operation macro.
2017-05-08 21:53:43 +08:00
Jeroen Domburg
9962cc9c9f
Fix out-of-bounds on dmaworkaround_channels_busy
2017-05-08 16:11:46 +08:00
Jeroen Domburg
04b901e629
SPI: More MR issues fixed, style fixup
2017-04-27 11:49:04 +08:00
Jeroen Domburg
cecb846450
SPI: Fix comment for 3wire, make GPIO pins GPIO_MODE_INPUT_OUTOUT. Fixes https://github.com/espressif/esp-idf/issues/533
2017-04-27 11:49:04 +08:00
Jeroen Domburg
4c06dca15c
SPI: Small fixes according to MR comments
2017-04-27 11:49:04 +08:00
Jeroen Domburg
e9c372bc2d
SPI: Split common SPI stuff out of master driver; add slave driver; add workaround for DMA issue.
2017-04-27 11:49:04 +08:00
