Sudeep Mohanty
b72f987c5c
ulp: Added ULP RISC-V support for esp32s3
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This commit adds support for ULP RISC-V for esp32s3.
Signed-off-by: Sudeep Mohanty <sudeep.mohanty@espressif.com>
2022-06-22 13:33:14 +08:00
Ivan Grokhotkov
0277ba7e4e
ulp: fix quoting issues for linker script and map file arguments
2021-10-06 10:42:07 +02:00
Renz Bagaporo
7c22cccb9c
esp32: cleanup build script
2021-07-16 20:14:27 +08:00
Shu Chen
6fce2930d0
esp32h2: enable more components to support esp32h2
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Involved components:
* app_trace
* esp-tls
* esp_adc_cal
* esp_pm
* esp_serial_slave_link
* esp_timer
* freertos
* idf_test
* log
* mbedtls
* newlib
* perfmon
* spi_flash
* spiffs
* ulp
* unity
* vfs
2021-07-01 19:53:11 +08:00
Angus Gratton
a041faec77
Merge branch 'feature/ulp_riscv_delay' into 'master'
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riscv-ulp: Add DS18B20 1wire RISCV-ULP example
Closes IDF-1746 and IDF-3456
See merge request espressif/esp-idf!14115
2021-06-27 23:45:38 +00:00
Marius Vikhammer
386739595f
RISCV-ULP: Add DS18B20 1wire RISCV-ULP example
2021-06-25 11:26:39 +08:00
Roland Dobai
407053592e
Drop support for unsupported Python versions
2021-06-21 21:48:49 +02:00
Marius Vikhammer
bdfda351bd
build docs: enable building of S3 docs
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* Added suport for building esp32s3 docs
* Fixed all related warnings
* Activated building of S3 docs for build HTML fast CI job
2021-06-09 09:30:36 +08:00
Angus Gratton
52b555e1e0
esp32s2 riscv ulp: Make re-linking depend on linker script file
2021-05-06 09:25:32 +10:00
Angus Gratton
3ee4370578
esp32s2 riscv ulp: Ensure reset vector is always at offset 0x0
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Previous linker script relied on nothing else using the .text section
As reported at https://esp32.com/viewtopic.php?f=2&t=20734&p=75997
2021-05-06 09:25:32 +10:00
Ivan Grokhotkov
e77a91df7f
Merge branch 'doc/ulp_st_bits' into 'master'
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ulp: update ST instruction description (Github PR)
Closes IDFGH-3224
See merge request espressif/esp-idf!13159
2021-04-26 07:15:15 +00:00
Michael (XIAO Xufeng)
06ec13e422
Merge branch 'bugfix/fix_co-cpu_riscv_ulp_ld_for_esp32s2' into 'master'
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bugfix: add .rodata section for riscv ulp for esp32s2
See merge request espressif/esp-idf!13109
2021-04-19 07:49:58 +00:00
boarchuz
7e7c044afa
update ulp st doc
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Merges https://github.com/espressif/esp-idf/pull/5222
2021-04-15 16:16:11 +02:00
fuzhibo
357b64fd2c
bugfix: add .rodata section for riscv ulp for esp32s2
2021-04-12 14:29:13 +08:00
Angus Gratton
9c2f180049
ulp: Fix bug where ULP linker script not regenerated for new config
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ULP linker script relies on value of CONFIG_ESP32S2_ULP_COPROC_RESERVE_MEM,
when this value changes in config then it should be regenerated.
2021-03-31 19:25:35 +11:00
Angus Gratton
f7a8593a3b
Merge branch 'style/python_isort_double_quote_fixer' into 'master'
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style: format python files with isort and double-quote-string-fixer
See merge request espressif/esp-idf!12149
2021-01-27 12:25:39 +08:00
Fu Hanxi
0146f258d7
style: format python files with isort and double-quote-string-fixer
2021-01-26 10:49:01 +08:00
Renz Bagaporo
19d8a403e6
ulp: set riscv-ulp as done signal source properly
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Closes https://github.com/espressif/esp-idf/issues/6069
2021-01-22 15:22:01 +08:00
Marius Vikhammer
68608f804c
esp32c3: Misc fixes needed to build & run
2020-12-31 15:20:05 +11:00
Ivan Grokhotkov
de798541dc
tools: use riscv32-esp-elf toolchain for ESP32-S2 RISC-V ULP
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riscv32-esp-elf toolchain (used for ESP32-C3) can also be used for
ESP32-S2 RISC-V ULP coprocessor.
This removes the riscv-none-embed-gcc toolchain which was originally
used for the ULP, and updates the docs and CMake files to use
riscv32-esp-elf.
Some flags are cleaned up and workarounds removed from CMake toolchain
file.
2020-12-29 19:19:18 +00:00
martin.gano
f4ea2dcb74
Tools: add Python 2 deprecation warning
2020-12-02 11:08:48 +01:00
Angus Gratton
66fb5a29bb
Whitespace: Automated whitespace fixes (large commit)
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Apply the pre-commit hook whitespace fixes to all files in the repo.
(Line endings, blank lines at end of file, trailing whitespace)
2020-11-11 07:36:35 +00:00
Angus Gratton
e82eac4354
cmake: Apply cmakelint fixes
2020-11-11 07:36:35 +00:00
Dmitry Yakovlev
0a8afd13a2
Udate instruction set documentation for Esp32 and Esp32s2.
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Sleep instruction removed from S2 instruction set.
LDx/STx instructions descritioin fix offset range to 13 bits (11 bits signed 32 bit words offset).
Remove I2C RD/WR operations from S2.
2020-10-17 02:44:47 +08:00
morris
9fa06719fa
global: enable build uinit test for esp32-s3
2020-09-22 15:15:03 +08:00
morris
61f89b97c6
bringup esp32-s3 on FPGA
2020-09-22 15:15:03 +08:00
Ivan Grokhotkov
0efad5951b
Merge branch 'bugfix/ulp_doc_typo' into 'master'
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ulp: typo fix (Github PR)
Closes IDFGH-1899
See merge request espressif/esp-idf!10382
2020-09-15 01:11:25 +08:00
Ivan Grokhotkov
b6467257b9
Merge branch 'feature/cmock_component' into 'master'
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cmock as component replacing unity
See merge request espressif/esp-idf!9859
2020-09-10 16:06:20 +08:00
boarchuz
137bc6658c
ulp: typo fix
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rd_reg comment references incorrect OPCODE ("OPCODE_WR_REG"); amended to "OPCODE_RD_REG".
Merges https://github.com/espressif/esp-idf/pull/4098
2020-09-10 01:33:50 +02:00
Roland Dobai
edd7c1a2ee
ulp: fix ULP assembler version detection for localized systems
2020-09-09 16:56:15 +02:00
Jakob Hasse
20c068ef3b
cmock: added cmock as component
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* changing dependencies from unity->cmock
* added component.mk and Makefile.projbuild
* ignore test dir in gen_esp_err_to_name.py
* added some brief introduction of CMock in IDF
2020-09-02 16:38:37 +08:00
He Hui Zi
dfa59e3d22
docs: translate api-guides/ulp-risc-v from EN to CN
2020-08-13 19:44:46 +08:00
morris
2917651478
esp_rom: extract common ets apis into esp_rom_sys.h
2020-07-27 15:27:01 +08:00
Felipe Neves
b6dba84323
ulp: added support to building code for riscv ULP coprocessor
2020-07-15 15:28:49 -03:00
Krzysztof
9b5acea160
Add missing link to ulp header files and link to example following https://esp32.com/viewtopic.php?f=2&t=15562
2020-05-14 17:31:05 +08:00
Renz Bagaporo
3d0967a58a
test: declare requirements and include dirs private
2020-03-23 10:58:50 +08:00
Renz Bagaporo
07a71529de
ulp: fix ulp external project args
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Closes https://github.com/espressif/esp-idf/issues/4713
2020-03-03 16:56:14 +08:00
Renz Christian Bagaporo
bb639bb91d
ulp: use quotes when specifying files for embedding ulp binaries
2020-02-18 00:12:56 +00:00
morris
e30cd361a8
global: rename esp32s2beta to esp32s2
2020-01-22 12:14:38 +08:00
morris
1c2cc5430e
global: bring up esp32s2(not beta)
2020-01-16 17:41:31 +08:00
Ivan Grokhotkov
917889dfdf
ulp: remove 20190801 version, update supported version for Make
2019-12-15 21:39:42 +01:00
Dmitry
b38bc2f8f5
s2 support for make build removed.
2019-11-22 09:03:23 +03:00
Dmitry
1518c410bc
A switch between esp32 and esp32s2betta added to the ULP build process.
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The new bin utils will have extension esp32s2ulp-elf, and they have to be placed to the bin directory.
2019-11-22 09:03:13 +03:00
Angus Gratton
4352265fa0
cmake: Fix case error passing extra CMake args to sub-projects
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Bug in commit f4ea7c5a
where the wrong variable case was used when passing
through to sub-projects
2019-11-08 11:56:13 +08:00
Angus Gratton
f4ea7c5a46
cmake: Set uninitialized variable warnings in ULP & bootloader subprojects
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Fixes issue where PYTHON was not being expanded when running ulp_mapgen.py,
causing Windows launch setting to be used - reported here:
https://esp32.com/viewtopic.php?f=13&t=12640&p=50283#p50283
2019-10-29 05:38:39 +00:00
Angus Gratton
6b7da96d5b
ulp: Add header for common ULP definitions
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Fixes problems with duplicate error codes in the two chip-specific ulp headers
2019-09-16 16:18:53 +10:00
Angus Gratton
438d513a95
Merge branch 'master' into feature/esp32s2beta_merge
2019-09-16 16:18:48 +10:00
Michael (XIAO Xufeng)
9baa7826be
fix unit test and examples for s2beta
2019-09-04 10:53:25 +10:00
Saket Dandawate
ccc95191ea
ulp: Add aditional uint32_t object to ulp_insn_t
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Used to get the encoded instruction from bit-field structs.
Merges https://github.com/espressif/esp-idf/pull/3759
2019-08-15 17:34:26 +02:00
boarchuz
28ca2d72b8
ulp: Correct misleading corrections of i2c comments
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Merges https://github.com/espressif/esp-idf/pull/3580
2019-08-15 17:34:19 +02:00