alex/esp-idf
alex/esp-idf
1
0
Fork 0
mirror of https://github.com/espressif/esp-idf.git synced 2024-10-05 20:47:46 -04:00
Code Issues Actions 2 Packages Projects Releases Wiki Activity
18,967 Commits 20 Branches 148 Tags 384 MiB
b6896055a2
Commit Graph

404 Commits

Author SHA1 Message Date
jingli
24eea75f9c esp_hw_support/sleep: fix current leakage when hold digital io during deep sleep 2022-11-18 03:00:01 +00:00
Michael (XIAO Xufeng)
af61c51385 Merge branch 'test/rtc_8m_d256_v4.3' into 'release/v4.3' 
rtc: fixed 8MD256 can't be used as RTC slow src on ESP32 (v4.3)

See merge request espressif/esp-idf!18106
 2022-11-12 00:45:11 +08:00
Michael (XIAO Xufeng)
7931c033ed pm: fixed RTC8M domain power issues 
introduced in e44ead5356

1. The int8M power domain config by default is PD. While LEDC is using
RTC8M as clock source, this power domain will be kept on.

But when 8MD256 is used as RTC clock source, the power domain should
also be kept on.

On ESP32, there was protection for it, but broken by commit
e44ead5356. Currently the power domain
will be forced on when LEDC is using RTC8M as clock source &&
!int8m_pd_en (user enable ESP_PDP_DOMAIN_RTC8M in lightsleep). Otherwise
the power domain will be powered off, regardless of RTC clock source.

In other words, int8M domain will be forced off (even when 8MD256
used as RTC clock source) if LEDC not using RTC8M as clock source, user
doesn't enable ESP_PDP_DOMAIN_RTC8M, or in deep sleep.

On later chips, there's no such protection, so 8MD256 could't be used as
RTC clock source in sleep modes.

This commit adds protection of 8MD256 clock to other chips. Fixes the
incorrect protection logic overriding on ESP32. Now the power domain
will be determiend by the logic below (order by priority):

    1. When RTC clock source uses 8MD256, power up
    2. When LEDC uses RTC8M clock source, power up
    3. In deepsleep, power down
    4. Otherwise determined by user config of ESP_PDP_DOMAIN_RTC8M,
       power down by default. (This is preferred to have highest
       priority, but it's kept as is because of current code structure.)

2. Before, after the macro `RTC_SLEEP_CONFIG_DEFAULT` decides dbias, the
protection above may force the int8m PU. This may cause the inconsistent
of dbias and the int8m PU status.

This commit lifts the logic of pd int8m/xtal fpu logic to upper layer
(sleep_modes.c).

Related: https://github.com/espressif/esp-idf/issues/8007, https://github.com/espressif/esp-idf/pull/8089

temp
 2022-11-05 20:02:53 +08:00
Michael (XIAO Xufeng)
b56b459960 rtc: fixed 8MD256 can't be used as RTC slow src on ESP32 
Sync configuration from other chips

Closes: https://github.com/espressif/esp-idf/issues/8007, https://github.com/espressif/esp-idf/pull/8089
 2022-11-04 12:37:45 +08:00
morris
9a9f503c73 Merge branch 'bugfix/spi2_add_device_cs_more_than_3_v4.3' into 'release/v4.3' 
spi_master:fix error when use `spi_bus_add_device` more than 3 device(v4.3)

See merge request espressif/esp-idf!20127
 2022-11-01 10:18:24 +08:00
Jiang Jiang Jian
6225c718c3 Merge branch 'bugfix/fix_xtal_related_rtc_params_for_esp32_backport_v4.3' into 'release/v4.3' 
esp32/rtc: fix xtal unstable in some cases when sleep(backport v4.3)

See merge request espressif/esp-idf!20804
 2022-10-31 19:52:04 +08:00
jingli
91b147c9da wifi/bt: fix part of modem module not reset when power up 2022-10-26 20:47:10 +08:00
jingli
b6491464e1 esp32/rtc: fix xtal unstable in some cases when sleep 
1. add xtal buf wait to fix high temperature restart issue
2. add min sleep value to fix xtal stop due to too short sleep time issue
 2022-10-26 17:05:07 +08:00
chenjianhua
fb20a1be8e Revert "Fixed ESP32 BLE can't resolve the peer address when enable white list" 
This reverts commit 192aa18c31.
 2022-10-09 15:28:39 +08:00
jingli
07d69b7cae esp_hw_support/clk_cali: fix xtal32k error detect 2022-09-21 16:29:36 +08:00
wanlei
8290d450f3 spi_master:fix error when use spi_bus_add_device more than 3 device 
update gpio_sig at `spics_out` array in each spi_periph.c of chips later than s2
then `spi_bus_add_device` can correctly distribute gpio_signals for cs_signal

Closes https://github.com/espressif/esp-idf/issues/8876
 2022-09-14 12:40:29 +08:00
songruojing
5f3f615ff1 uart: fixed incorrect channel number on ESP32S2, S3 and C3 2022-03-02 02:56:23 +08:00
Cao Sen Miao
1f980ae982 psram: add ESP32-D0WD-R2-V3 support 2022-02-13 22:31:24 +08:00
weitianhua
b2fba50e78 Remove dummy defines of Classic BT 2021-10-29 14:37:23 +08:00
weitianhua
58ff27cc03 Make Classic BT related document links only visible for ESP32 2021-10-29 14:25:31 +08:00
suda-morris
91fa868bd6 twai: update register struct file 2021-10-12 10:42:04 +08:00
SalimTerryLi
29accf2533 soc/ll: workaround compiler bug that generate 8/16 bits inst instead of 32 bits one 
Note: on ESP32 UART rxfifo seems to be read as u8 instead of u32 to make it work
 2021-10-12 10:42:04 +08:00
Song Ruo Jing
3bcc85d96d Merge branch 'bugfix/enable_gpio_20_v4.3' into 'release/v4.3' 
gpio: Enable IO20 on ESP32 (backport v4.3)

See merge request espressif/esp-idf!15022
 2021-10-09 08:44:17 +00:00
Li Shuai
4f4254537c esp_hw_support: No voltage drop during light sleep to ensure stable output clock of rtc8m oscillator 2021-09-28 11:20:00 +08:00
Li Shuai
4ef6e37fcb Power Management: add RTC8M power domain to control whether internal 8m oscillator is powered down during sleep 2021-09-28 11:19:57 +08:00
Alberto García Hierro
68f8b999bb Enable IO20 on ESP32 
Some newer ESP32 variants (like ESP32-PICO-V3 and ESP32-PICO-MINI-02)
do implement this pin and it can be used as a normal GPIO.

Fixes #6016
Fixes #6837

Closes https://github.com/espressif/esp-idf/pull/6918

(cherry picked from commit 6deaefde69)
 2021-08-31 20:11:00 +08:00
xiewenxiang
032f6d34d1 component/bt: add local irk to controller 2021-08-06 18:19:25 +08:00
xiewenxiang
192aa18c31 Fixed ESP32 BLE can't resolve the peer address when enable white list 2021-07-30 15:09:00 +08:00
Angus Gratton
22a02656b7 bootloader: Fix selection of Quad I/O modes on ESP32-U4WDH chip 
Closes https://github.com/espressif/esp-idf/issues/6191
 2021-06-07 14:53:43 +10:00
Darian Leung
00801c8044 TWAI: Simply caps and remove unused caps 2021-04-26 19:34:30 +08:00
Armando
670b057b04 spi: remove HSPI macro on esp32c3 and esp32s3 2021-04-06 15:30:28 +08:00
Xia Xiaotian
e5e47ebae6 esp_wifi: store PHY digital registers before disabling PHY and load 
them after enabling PHY
 2021-02-26 16:34:10 +08:00
Michael (XIAO Xufeng)
d7d1dee208 system: reset dma when soft reset 2021-01-25 04:51:40 +00:00
Angus Gratton
3532f52f60 Merge branch 'bugfix/ldgen_ignore_nonexistent_archives_and_obj' into 'master' 
ldgen: check mappings

Closes IDF-1624

See merge request espressif/esp-idf!8557
 2021-01-21 15:59:35 +08:00
Angus Gratton
fe8a891de9 Merge branch 'feature/support_esp32c3_master_cmake_secure_boot' into 'master' 
bootloader/esp32c3: Support secure boot

Closes IDF-2115

See merge request espressif/esp-idf!11797
 2021-01-21 08:42:49 +08:00
KonstantinKondrashov
88c5fe49b8 soc: Adds a soc_caps define for all chips to define the number of boot key digests 2021-01-19 20:51:13 +08:00
Li Shuai
aa7fd175b9 light sleep: light sleep support for esp32c3 2021-01-19 14:50:58 +08:00
Renz Bagaporo
d1c800fbbb components: fix ldgen check errors 2021-01-19 11:17:18 +08:00
ninh
27aa6c289f components/pm: Add slp gpio configure workaround 2021-01-15 15:34:45 +08:00
morris
e6d23a35ec gdma: dynamic alloc DMA channels 2021-01-13 10:52:27 +08:00
ninh
dc7bdb9857 adjust lightsleep overhead time and cali slowclk 2021-01-06 03:40:28 +00:00
Marius Vikhammer
eb788deb03 esp_hw_support: merge C3 changes to master 
Merge RTC related C3 changes to master
 2020-12-30 12:20:41 +08:00
Angus Gratton
1b0442b963 Merge branch 'feature/unify_rtc_fast_mem_as_heap_config_across_chips' into 'master' 
esp_system: make rtc fast memory to heap configuration unified across chips

Closes IDF-2503

See merge request espressif/esp-idf!11693
 2020-12-29 11:41:05 +08:00
Angus Gratton
c3ba995f2c Merge branch 'ci/ccomp_performance_tests' into 'master' 
unit_test: Refactor all performance tests that rely on cache compensated timer

See merge request espressif/esp-idf!11709
 2020-12-24 13:44:52 +08:00
Mahavir Jain
880a63b2e9 esp_system: make rtc fast memory to heap configuration unified across chips 
Closes IDF-2503
 2020-12-24 09:46:35 +05:30
Angus Gratton
705d797b41 Merge branch 'feature/esp32c3_drivers' into 'master' 
driver: Add esp32c3

Closes IDF-2363

See merge request espressif/esp-idf!11650
 2020-12-23 08:43:31 +08:00
Angus Gratton
fa892eb017 soc: Explain units for rtc_clk_cal() function, fix typo 2020-12-23 09:53:24 +11:00
Cao Sen Miao
e338a2e3df rtc: add function to en/disable the rtc clock 2020-12-23 09:53:24 +11:00
Marius Vikhammer
0a95151a75 unit_test: Refactor all performance tests that rely on cache compensated timer 
There is no ccomp timer on C3, which means our performance tests will start
failing again due to variance caused by cache misses.

This MR adds TEST_PERFORMANCE_CCOMP_ macro that will only fail
performance test if CCOMP timer is supported on the target
 2020-12-22 18:56:24 +11:00
boarchuz
06d6146445 fix rtc_gpio_desc_t compilation error 
Closes https://github.com/espressif/esp-idf/pull/6029
Closes https://github.com/espressif/esp-idf/issues/6301
Closes IDFGH-4470
Closes IDFGH-4167
 2020-12-21 13:54:52 +05:30
Cao Sen Miao
0736c91d68 soc: Remove cache constants from soc.h 2020-12-17 15:34:13 +11:00
Marius Vikhammer
457ce080ae AES: refactor and add HAL layer 
Refactor the AES driver and add HAL, LL and caps.

Add better support for running AES-GCM fully in hardware.
 2020-12-10 09:04:47 +00:00
Angus Gratton
c29d93986d soc: Add initial ESP32-C3 support 
From internal commit 7761d6e8
 2020-11-30 11:12:56 +11:00
Armando
fb8b905539 uart: add uart support on esp32s3 2020-11-24 19:12:51 +08:00
morris
c5fe158929 doc: fix wrong register description regarding to ethernet SMI 2020-11-16 13:30:49 +08:00