zlq
b44530f188
1.add ldo parameters in efuse table; 2.set ldo based on pvt-efuse; 3.ldo voltage is changed based on cpu freq
2022-09-29 03:16:49 +08:00
Wu Zheng Hui
2e4784611d
efuse: update efuse name (backport v4.4)
2022-05-30 11:15:16 +08:00
Armando
4a429d59ac
adc: update adc calibration efuse version
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ADC calibration scheme and algorithm are not changed. Only the eFuse bit BLOCK1_VERSION is changed. This MR updated the logic to recognize the adc efuse version
2021-12-13 13:03:23 +08:00
Marek Fiala
ff18a96f7d
tools: replace _ with - in idf.py
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Closes https://github.com/espressif/esp-idf/issues/5126
2021-10-13 17:30:38 +08:00
Wu Zheng Hui
85651b4791
efuse: remove DIS_RTC_RAM_BOOT efuse bit
2021-09-18 14:58:43 +08:00
Armando
c45c6f52f1
adc: support adc efuse-based calibration on esp32s3
2021-09-14 11:42:50 +08:00
KonstantinKondrashov
40c360a096
efuse: Add CUSTOM_MAC address for ESP32-C3/-S2/-S3/-H2
2021-08-02 14:43:27 +05:00
KonstantinKondrashov
4d35b1fc5b
efuse: Updates common_efuse_table for all chips
2021-05-31 08:42:57 +00:00
KonstantinKondrashov
9490d78f49
efuse/esp32s3: Update efuse table
2021-05-04 14:40:15 +08:00
Angus Gratton
66fb5a29bb
Whitespace: Automated whitespace fixes (large commit)
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Apply the pre-commit hook whitespace fixes to all files in the repo.
(Line endings, blank lines at end of file, trailing whitespace)
2020-11-11 07:36:35 +00:00
KonstantinKondrashov
66b9b589cb
efuse: Adds support for esp32-s2 chip
2020-10-14 16:26:51 +08:00
morris
61f89b97c6
bringup esp32-s3 on FPGA
2020-09-22 15:15:03 +08:00
