1. Clean up clk usage in IDF, replace rtc_clk_xtal/apb_freq_get with
upper level API esp_clk_xtal/apb_freq
2. Fix small errors and wrong comments related to clock
3. Add clk_tree_defs.h to provide an unified clock id for each chip
Modify the NGed drivers to adopt new clock ids
1. deepsleep poweron reset bug in high temperature before ECO3;
2. brownout reset bug before ECO2;
3. bbpll voltage low bug before ECO3;
4. need xpd iph for xtal before ECO3;