Marius Vikhammer
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d6eedc04bf
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Revert "fix(intr): fixed intr threshhold min level on C5"
This reverts commit a6c2c4149d.
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2024-06-24 13:57:57 +08:00 |
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Konstantin Kondrashov
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14d93dea75
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feat(soc): Update efuse related soc_caps for c61 and c5 (MP/beta3)
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2024-06-20 12:23:05 +08:00 |
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Jiang Jiang Jian
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3db95e4f0e
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Merge branch 'fix/cleanup_unaccessible_sha3_regs_v5.3' into 'release/v5.3'
fix(soc): Cleanup inaccessible SHA_3 registers from the header files (v5.3)
See merge request espressif/esp-idf!31440
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2024-06-13 14:04:06 +08:00 |
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Michael (XIAO Xufeng)
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98e99e712f
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Merge branch 'feature/esp32c5_mp_gpio_support_v5.3' into 'release/v5.3'
Feature/esp32c5 mp gpio support (v5.3)
See merge request espressif/esp-idf!30884
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2024-06-12 00:51:06 +08:00 |
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harshal.patil
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8445486303
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fix(soc): Cleanup inaccessible SHA registers from the header files
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2024-06-11 14:24:09 +05:30 |
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Marius Vikhammer
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a6c2c4149d
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fix(intr): fixed intr threshhold min level on C5
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2024-06-03 12:44:32 +08:00 |
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gaoxu
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bf604e91a6
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feat(gpio): remove io_mux_reg array in gpio_periph.c from c5
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2024-05-27 18:13:42 +08:00 |
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gaoxu
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a621402e1f
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feat(pm): add SOC_PM_SUPPORTED in soc caps
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2024-05-16 15:00:22 +08:00 |
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Song Ruo Jing
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665883229e
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fix(gpio_etm): allow one GPIO binds to multiple ETM tasks
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2024-04-24 15:58:49 +08:00 |
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wuzhenghui
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ffd5d1fd66
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feat(esp_hw_support): support set clock divider for esp32p4 clock output
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2024-04-17 15:09:54 +08:00 |
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wuzhenghui
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309725fcd0
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feat(esp_hw_support): support esp32p4 clock output
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2024-04-17 15:09:49 +08:00 |
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wuzhenghui
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101f1abbf1
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refactor(esp_hw_support): add hal layer for clock output feature
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2024-04-17 14:25:29 +08:00 |
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Cao Sen Miao
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0985bfbe27
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feat(i2c_master): Add lp_i2c support in i2c master driver
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2024-04-03 11:39:04 +08:00 |
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xiehang
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f3c5047638
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feat(extconn): Supports external WiFi connections for ESP32p4 and other espressf chips
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2024-04-01 11:44:52 +08:00 |
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xiehang
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9d7bd6a8dd
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change(esp_phy): Add SOC_PHY_SUPPORTED to control phy mode
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2024-04-01 11:36:55 +08:00 |
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Li Shuai
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59115cd2d1
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change(esp_hw_support): some system peripherals to use a retention module number
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2024-03-29 15:27:08 +08:00 |
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Li Shuai
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080d09387c
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change(esp_hw_support): modify the style of module argument from bitmap to number
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2024-03-29 15:22:52 +08:00 |
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wuzhenghui
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4a64d2fe2c
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change(hal): control PAU bus clock by hal layer
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2024-03-29 00:36:46 +08:00 |
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wanlei
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535afdd7f4
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feat(esp32c61): ci enable header check, fix c61 build
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2024-03-27 19:39:59 +08:00 |
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Konstantin Kondrashov
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8d6562d1f1
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Merge branch 'feature/c5_c61_efuse_update' into 'master'
feat(efuse): Update efuses for C5 and C61
Closes IDF-8629 and IDF-8674
See merge request espressif/esp-idf!29627
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2024-03-22 18:02:37 +08:00 |
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Konstantin Kondrashov
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25bc10e143
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feat(efuse): Update efuses for C5 and C61
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2024-03-21 18:37:46 +02:00 |
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wanlei
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a611e91b2f
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feat(esp32c61): new chip add system and esp_timer support
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2024-03-21 11:31:15 +08:00 |
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wanlei
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37dfd8fb52
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feat(esp32c61): add G0 component support
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2024-03-18 14:28:27 +08:00 |
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wanlei
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616c72b96c
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feat(esp32c61): add & modify soc header files pass build (part 3/3)
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2024-03-12 18:53:28 +08:00 |
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wanlei
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aec7aa3416
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feat(esp32c61): add soc header files (2/2)
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2024-03-06 11:42:14 +08:00 |
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Wan Lei
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84f27d65f6
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Merge branch 'feat/c6lite_c61_introduce_step2_soc' into 'master'
feat(esp32c61): add soc peripheral header files (stage 2/8, part 1/2)
See merge request espressif/esp-idf!29353
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2024-03-06 10:30:39 +08:00 |
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wanlei
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ee02b71f1c
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feat(esp32c61): introduce target esp32c61
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2024-03-01 21:12:25 +08:00 |
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wanlei
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5fef81609a
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feat(esp32c61): add soc peripheral header files (1/2)
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2024-03-01 18:09:13 +08:00 |
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