Commit Graph

12 Commits

Author SHA1 Message Date
Angus Gratton
a91bd4078f secure boot: Fixes for ESP32-S2 first boot logic 2020-07-27 00:01:10 +00:00
morris
345606e7f3 esp_rom: extract common uart apis into esp_rom_uart.h 2020-07-17 16:00:59 +08:00
Ivan Grokhotkov
4f8c42ca73 esp_rom: add patch to set USB device serial descriptor to MAC address 2020-06-24 15:50:51 +02:00
Ivan Grokhotkov
4901917ea3 esp_rom: add USB related headers from the ROM code 2020-06-24 15:50:51 +02:00
morris
a34409cffc esp_rom: extract common CRC apis into esp_rom_crc.h 2020-06-23 16:40:14 +08:00
morris
0daff849a4 esp_rom: remove unsupported library on esp32s2
Closes https://github.com/espressif/esp-idf/issues/5434
2020-06-11 21:40:08 +08:00
morris
9cc0f33ed5 esp_rom: add esp32s3 rom symbols 2020-06-11 21:40:08 +08:00
Angus Gratton
d40c69375c bootloader: Add fault injection resistance to Secure Boot bootloader verification
Goal is that multiple faults would be required to bypass a boot-time signature check.

- Also strengthens some address range checks for safe app memory addresses
- Change pre-enable logic to also check the bootloader signature before enabling SBV2 on ESP32

Add some additional checks for invalid sections:

- Sections only partially in DRAM or IRAM are invalid
- If a section is in D/IRAM, allow the possibility only some is in D/IRAM
- Only pass sections that are entirely in the same type of RTC memory region
2020-02-27 14:37:19 +05:30
Michael (XIAO Xufeng)
278634dcbd sdspi: support crc16_be for esp32s2 2020-02-12 15:15:46 +08:00
Wangjialin
aaf119e930 flash(esp32s2): fix setting address field in spi user mode. 2020-02-07 16:10:51 +01:00
morris
405b0e7f06 esp_rom: splict libgcc and libc outof rom.ld bundle file 2020-01-23 00:27:47 +08:00
morris
e30cd361a8 global: rename esp32s2beta to esp32s2 2020-01-22 12:14:38 +08:00