8 Commits

Author	SHA1	Message	Date
wanlei	1e6c61daa6	spi_master: sct mode support set line mode, transaction interval time ... support line mode 1-2-4-8 depend on targets. fix sct mode dma descriptor counter compute issue. add conf_bits_len setting API to control interval time.	2024-03-20 15:42:03 +08:00
Armando	b303e4b7a6	spi_master: new segmented-configure-transfer mode	2024-03-20 15:42:03 +08:00
wanlei	45cbcad7cd	fix(spi_master): fix P4 clock src divider and 8bit support	2024-01-26 14:51:46 +08:00
wanlei	4a46d70e9a	fix(spi_master): Fix p4 spi clock source support other than XTAL	2024-01-17 17:01:23 +08:00
wanlei	2baee4fb0f	refactor(spi_master): replace dma_ll in spi hal layer (part 2.1)	2023-12-28 19:58:54 +08:00
wanlei	d0023b061f	refactor(spi): replace dma_ll related in spi by dma driver (part1)	2023-12-04 16:20:05 +08:00
Armando	714ad573e7	refactor(esp_driver_spi): reformat code with astyle_py	2023-11-09 14:50:05 +08:00
Armando	fca46eac52	refactor(spi): make spi driver as component	2023-11-09 14:50:05 +08:00