Commit Graph

15 Commits

Author SHA1 Message Date
cje
a0ed82525e sleep: fix sleep time inaccurate bug when select 8MD256 as rtc slow clock on ESP32
Related to: https://github.com/espressif/esp-idf/issues/6687
2022-12-26 07:19:13 +00:00
jingli
0a44d09f4f esp32/rtc: fix xtal unstable in some cases when sleep
1. add xtal buf wait to fix high temperature restart issue
2. add min sleep value to fix xtal stop due to too short sleep time issue
2022-10-09 19:58:58 +08:00
songruojing
c8752cee6a clk_tree: Refactor rtc_clk.c by adding HAL layer for clock subsystem 2022-06-13 17:47:50 +08:00
Michael (XIAO Xufeng)
6f507d527c rtc: fixed 8MD256 can't be used as RTC slow src on ESP32
Sync configuration from other chips

Closes: https://github.com/espressif/esp-idf/issues/8007, https://github.com/espressif/esp-idf/pull/8089
2022-05-14 22:35:41 +08:00
Angus Gratton
2ec04b57de soc esp32: Removes parentheses from RTC_MEM_xyz macros that expand directly to single numbers
Not necessary in these cases, and prevents parens from expanding into the
assembly code such as added in 562ab01046  -
a pattern which is accepted by GCC assembler but illegal syntax for LLVM assembler.

As reported https://github.com/espressif/llvm-project/issues/35#issuecomment-726853574
2021-02-08 10:08:01 +11:00
Angus Gratton
66fb5a29bb Whitespace: Automated whitespace fixes (large commit)
Apply the pre-commit hook whitespace fixes to all files in the repo.

(Line endings, blank lines at end of file, trailing whitespace)
2020-11-11 07:36:35 +00:00
Renz Bagaporo
79887fdc6c soc: descriptive part occupy whole component 2020-10-28 07:21:29 +08:00
Renz Christian Bagaporo
1f2e2fe8af soc: separate abstraction, description and implementation 2020-02-11 14:30:42 +05:00
Ivan Grokhotkov
ac623a9756 soc/rtc: restore dbg attenuation when waking from sleep
This fixes inability to enter deep sleep after waking up from light sleep
2018-04-26 18:52:46 +08:00
Ivan Grokhotkov
ca751648fa ulp: document the need to wait for RTC to be ready for wakeup 2017-12-11 12:11:46 +08:00
Ivan Grokhotkov
780569c04a esp32: fix RTC watchdog configuration in esp_restart
RTC watchdog didn’t have any actions configured for any of the stages.
This change configures it to use SW_SYSTEM_RESET at stage 0 and a
full reset at stage 1. The timeout is now calculated based on
RTC_SLOW_CLK frequency.
2017-07-10 17:21:49 +08:00
Ivan Grokhotkov
98e15df7f6 examples: add ULP ADC example 2017-05-16 13:15:02 +08:00
Ivan Grokhotkov
6353bc40d7 Add support for 32k XTAL as RTC_SLOW_CLK source
- RTC_CNTL_SLOWCLK_FREQ define is removed; rtc_clk_slow_freq_get_hz
  function can be used instead to get an approximate RTC_SLOW_CLK
  frequency

- Clock calibration is performed at startup. The value is saved and used
  for timekeeping and when entering deep sleep.

- When using the 32k XTAL, startup code will wait for the oscillator to
  start up. This can be possibly optimized by starting a separate task
  to wait for oscillator startup, and performing clock switch in that
  task.

- Fix a bug that 32k XTAL would be disabled in rtc_clk_init.

- Fix a rounding error in rtc_clk_cal, which caused systematic frequency
  error.

- Fix an overflow bug which caused rtc_clk_cal to timeout early if the
  slow_clk_cycles argument would exceed certain value

- Improve 32k XTAL oscillator startup time by introducing bootstrapping
  code, which uses internal pullup/pulldown resistors on 32K_N/32K_P
  pins to set better initial conditions for the oscillator.
2017-04-26 12:43:22 +08:00
Ivan Grokhotkov
7ee8ee8b7e soc: add source code of rtc_clk, rtc_pm 2017-04-11 15:45:54 +08:00
Ivan Grokhotkov
d6dbf15a1f soc: move header files into soc component 2017-04-11 14:06:40 +08:00