5 Commits

Author	SHA1	Message	Date
morris	9e7d2c0065	esp32c3: format and clean up interrupt and os port code	2021-01-05 15:39:46 +08:00
Felipe Neves	544a3f7df5	interrupt-allocator: reject vector allocation if its marked as not-implemented. and search to next available	2021-01-05 15:39:46 +08:00
Felipe Neves	f4781d3b1d	freertos: riscv port now uses interrupt allocator and crosscore interrupt	2021-01-05 15:39:46 +08:00
Felipe Neves	810be86f21	freertos/riscv: move freertos aware interrupt code from vectors to the freertos riscv port. ... The riscv vectors.S in riscv component contains the trap vector, which is responsible to defer interrupts and examine if a task context switch is needed, this change cleans up this code by hiding all freertos details behind on two functions rtos_it_enter/exit and their implementations are placed in freertos riscv port files.	2021-01-05 15:39:46 +08:00
Angus Gratton	87e13baaf1	freertos: Add RISC-V port ... Changes come from internal branch commit a6723fc	2020-11-13 07:49:11 +11:00