Commit Graph

7 Commits

Author SHA1 Message Date
Ivan Grokhotkov
2916bf9b6c
ulp: esp32ulp_mapgen: remove the special case for RISC-V, cleanup
There are multiple changes in this commit:

1. Unify the RISC-V and ULP-FSM code paths in esp32ulp_mapgen.py.
   It seems that these were originally introduced because `nm` output
   for the RISC-V case contained symbol sizes, while for the ULP-FSM
   no symbol sizes were reported. This makes sense, because the
   ULP-FSM object files are produced from assembly source, symbol
   sizes have to be added manually using the .size directive.
   In the case of RISC-V, the object files are built from C sources
   and the sizes are automatically added by the compiler.

   Now 'posix' output format is used for both RISC-V and ULP-FSM.

2. Move BASE_ADDR out of esp32ulp_mapgen.py. This now has to be passed
   from CMake, which should make it easier to modify if a new chip
   with a different RTC RAM base address is added.

3. Add C++ guards to the generated header file.

4. Switch from optparse to argparse for similarity with other IDF
   tools.

5. Add type annotations.
2022-08-30 02:34:28 +02:00
Roland Dobai
407053592e Drop support for unsupported Python versions 2021-06-21 21:48:49 +02:00
Fu Hanxi
0146f258d7 style: format python files with isort and double-quote-string-fixer 2021-01-26 10:49:01 +08:00
martin.gano
f4ea2dcb74 Tools: add Python 2 deprecation warning 2020-12-02 11:08:48 +01:00
Felipe Neves
b6dba84323 ulp: added support to building code for riscv ULP coprocessor 2020-07-15 15:28:49 -03:00
Roland Dobai
e1e6c1ae0a components: Correct the Python coding style 2018-12-17 07:52:38 +01:00
Dmitry Yakovlev
a6e4e89592 ulp: add build system integration and example 2017-03-27 12:41:00 +08:00