Commit Graph

26 Commits

Author SHA1 Message Date
Mahavir Jain
20af94ff53 Coredump config option rename throughout IDF 2020-09-30 20:22:27 +05:30
Felipe Neves
2e826b7a8f intr_alloc: split interrupt allocator into common-code and platform-code
esp_system: removed repeated interrupt allocator code and moved common code to esp_system

xtens: moved xtensa specific code from freertos to the xtensa component

hal/interrupt_controller: added interrupt controller hal and ll files

docs: update the doxyfile with new location of esp_itr_alloc.h file

xtensa: fixed dangerous relocation problem after moving xtensa interrupt files out of freertos

docs: removed Xtensa reference from intr_allocator api-reference

xtensa: pushed the interrupt function that manages non iram interrupts to the xtensa layer

esp_system/test: fixed platform dependent setting for intr_allocator tests

hal: rename the functions used to manage non iram interrupt mask.
2020-09-30 07:44:12 +08:00
morris
61f89b97c6 bringup esp32-s3 on FPGA 2020-09-22 15:15:03 +08:00
chenjianqiang
f19cabb7e4 psram: support psram for esp32s3 2020-09-22 15:15:03 +08:00
Felipe Neves
e67162a7ea startup: namespaced start_app and start_app_other_core to avoid user code collision 2020-09-15 16:05:19 -03:00
Felipe Neves
c471cce26c freertos/tests: added isr latency test with no parameter and parameter based yield from ISR 2020-09-14 16:12:38 +00:00
Felipe Neves
36b2737bb1 freertos/xtensa: make vportYIELD_FROM_ISR compatible with version that both takes argument or not 2020-09-14 16:12:38 +00:00
Ivan Grokhotkov
04b95f3567 freertos: don't clobber a4 while spilling register windows
Commit 891eb3b0 was fixing an issue with PS and EPC1 not being
preserved after the window spill procedure. It did so by saving PS in
a2 and EPC1 in a4. However the a4 register may be a live register of
another window in the call stack, and if it is overwritten and then
spilled to the stack, then the corresponding register value will end
up being corrupted. In practice the problem would show up as an
IllegalInstruction exception, when trying to return from a function
when a0 value was 0x40020.
Fix by using a0 register instead of a4 as scratch. Also fix a comment
about xthal_save_extra_nw, as this function in fact doesn't clobber
a4 or a5 because XCHAL_NCP_NUM_ATMPS is defined as 1.

Closes https://github.com/espressif/esp-idf/issues/5758
2020-09-02 15:40:41 +02:00
Ivan Grokhotkov
4e7e8598f3 freertos: ensure the interrupt stack is aligned
CONFIG_FREERTOS_ISR_STACKSIZE was set to 2100 when ELF core dump was
enabled, which resulted in a non-16-byte-aligned interrupt stack
offset. This triggered "is SP corrupted" check in the backtrace,
terminating the backtrace early.

Fix the default value, and make sure that the stack is always aligned,
regardless of the value of CONFIG_FREERTOS_ISR_STACKSIZE.
2020-08-05 12:51:41 +02:00
Angus Gratton
75402afcae Merge branch 'feature/esp32s3_clk_memory_layout' into 'master'
esp32s3: memory layout

See merge request espressif/esp-idf!9753
2020-07-29 13:48:25 +08:00
morris
2917651478 esp_rom: extract common ets apis into esp_rom_sys.h 2020-07-27 15:27:01 +08:00
morris
19761e3113 esp32s3: clk, memory layout 2020-07-27 13:05:22 +08:00
Ivan Grokhotkov
4cdc5edb4e Revert "freertos, soc: don't lower INTLEVEL when entering critical sections"
This reverts commit 614a580bbb.
2020-07-09 17:15:54 +02:00
Renz Bagaporo
98dc1b0188 esp_system: introduce intermediary function to call after system init
This MR uses an intermediary function `start_app` to call after system
initialization instead of `app_main`.

In RTOS builds, freertos provides `start_app` and calls `app_main`.
In non-RTOS builds, user provides `start_app` directly.
2020-06-19 18:40:10 +10:00
Renz Bagaporo
08cbfa6187 esp_system: fix various review issues 2020-06-19 18:40:10 +10:00
Renz Bagaporo
5e59b4a812 freertos: mark port_xSchedulerRunning as volatile 2020-06-19 18:40:10 +10:00
Renz Christian Bagaporo
67983d5c1c esp_system: restore order of some init functions 2020-06-19 18:40:10 +10:00
Renz Christian Bagaporo
ef2a44d251 esp_system: introduce single core mode proxy config 2020-06-19 18:40:10 +10:00
Renz Christian Bagaporo
c53ad56515 esp_system: startup flow modifications
Changes the startup flow to the ff:

hardware -> core libraries init  -> other libraries init -> os
init (optional) -> app_main

- hardware init resides in the port layer, and is the entry point

- core libraries init executes init functions of core components

- other libraries init executes init functions of other components (weak
references)

- after other lib is init, the app_main function is called, however,

 an OS can wrap the real call to app_main to init its own stuff, and
 *then* call the real app_main
2020-06-19 18:40:09 +10:00
Ivan Grokhotkov
f4ea9d4cea freertos: increase configMINIMAL_STACK_SIZE when building with -O0
FreeRTOS scheduler uses additional stack space, as in some functions
variables are placed onto the stack instead of registers.

This issue resulted in occasional stack overflows in dport task, when
compiling at -O0 optimization level.

- Increase the configMINIMAL_STACK_SIZE to 1kB.
- Enable the watchpoint at the end of stack in CI startup test for
  this optimization level.
2020-06-02 18:51:16 +02:00
Ivan Grokhotkov
614a580bbb freertos, soc: don't lower INTLEVEL when entering critical sections
This fixes the issue where XTOS_SET_INTLEVEL would lower INTLEVEL from
4 to 3, when eTaskGetState is invoked during the core dump, triggered
from the interrupt watchdog.
2020-06-02 15:42:24 +02:00
Renz Christian Bagaporo
2b100789b7 esp32, esp32s2: move panic handling code to new component 2020-03-10 19:56:24 +08:00
Sachin Parekh
301dacfb33 Exception handlers for LoadStoreError and LoadStoreAlignmentError
Configurable option to use IRAM as byte accessible memory (in single core mode) using
load-store (non-word aligned and non-word size IRAM access specific) exception handlers.
This allows to use IRAM for use-cases where certain performance penalty
(upto 170 cpu cycles per load or store operation) is acceptable. Additional configuration
option has been provided to redirect mbedTLS specific in-out content length buffers to
IRAM (in single core mode), allows to save 20KB per TLS connection.
2020-02-26 20:21:59 +08:00
Felipe Neves
9c8289b0d9 shared_stack: using watchpoint 1 to monitor the shared_stack instead of watchpoint 0 2020-02-10 12:03:30 -03:00
Angus Gratton
86034ad049 Merge branch 'feature/freertos_fpu_isr' into 'master'
feature/fpu: Enable usage of FPU inside of a ISR

Closes IDF-100

See merge request espressif/esp-idf!7348
2020-01-30 13:38:37 +08:00
Felipe Neves
429712c6eb freertos: moved all xtensa specific files into a separated folder 2020-01-27 16:05:30 -03:00