Commit Graph

11 Commits

Author SHA1 Message Date
harshal.patil
9b15189583
change(mbedtls): replace Cache ROM APIs usage with APIs from esp_cache.h
- Only APIs used in esp_crypto_shared_gdma and aes have been replaced
- Get dcache line size using cache api instead of Kconfig
2024-03-13 15:22:07 +05:30
harshal.patil
83dd60307f
feat(mbedtls/esp_crypto_shared_gdma): support AXI-DMA in the crypto shared gdma layer
- In case of AXI-DMA, the DMA descriptors need to be 8 bytes aligned
lldesc_t do not satify this condition thus we need to replace it with
dma_descriptor_t (align(4) and align(8)) in esp_crypto_shared_gdma.

- Added new shared gdma start API that supports the dma_descriptor_t
DMA descriptor.

- Added some generic dma descriptor macros and helper functions

- replace lldesc_t with dma_descriptor_t
2024-03-13 15:22:06 +05:30
morris
56a376c696 feat(esp_gdma): add hal interface for common operations
GDMA driver will be adapted to more DMA peripherals in the future.
This commit is to extract a minimal interface in the hal layer
2023-07-10 13:45:57 +08:00
Armando
4c0d6b6835 mbedtls: updated to use default gdma psram alignment
When accessing the PSRAM, the GDMA buffer alignment should be larger or
equal to the data cache line size
2023-02-28 10:42:22 +08:00
Laukik Hase
424c45df91 ci: Fix issues for build stage
- Fixed logs expecting different format specifier
- Updated ignore list for check_public_header test
- Updated functions ported from mbedTLS
2022-01-25 10:51:27 +05:30
Marius Vikhammer
63280dfec0 aes/sha: fixed driver reseting the wrong GDMA channel
Driver was using the channel ID from tx when reseting rx.
But since rx and tx is not necessarily from the same pair this could lead
to the driver reseting the wrong DMA channel.
2021-08-30 10:37:03 +08:00
Marius Vikhammer
bf21cf0c99 aes/sha: change gdma transfer ability for sram to be 1 byte aligned
Previously GDMA transfer ability was set to 4 bytes, but buffers might
be not fulfill these requirements
2021-08-05 11:02:17 +08:00
morris
d9819bc7ae gdma: set transfer ability 2021-07-16 14:47:09 +08:00
morris
3176ba11d8 gdma: update DMA soc data for esp32-s3 2021-07-16 14:47:09 +08:00
Marius Vikhammer
19a492bc8d soc: add base support for ESP32-S3
Updates the following with changes from verification branches:

 * esp_rom linker files
 * rtc_cntl and system reg and struct headers

Also updates:
 * GDMA driver with new register layout
 * esptool submodule commit
2021-06-07 10:40:14 +08:00
Marius Vikhammer
fe71a8e340 aes/sha: use a shared lazy allocated GDMA channel for AES and SHA
Removed the old dynamically allocated GDMA channel approach.
It proved too unreliable as we couldn't not ensure consumers of the mbedtls
would properly free the channels after use.

Replaced by a single shared GDMA channel for AES and SHA, which won't be
released unless user specifically calls API for releasing it.
2021-03-09 09:23:05 +08:00