Commit Graph

31 Commits

Author SHA1 Message Date
Cao Sen Miao
44e16a6401 fix(spi_flash): Fix issue that flash encryption failed while rom_impl config is enabled
The issue is `esp_flash_write_encryped` function in ROM on ESP32C3, ESP32S3
calls legacy implementation, which uses old configuration. And this causes
write fails.
The solution in this commit is to compile and link this function(and related)
in IRAM instead of the ROM one.
The IRAM cost increases around 1.2KB after the fix
2024-02-28 10:07:53 +08:00
Cao Sen Miao
dcff5220a7 feat(spi_flash): Support configurable tSUS in flash suspend 2023-11-06 18:04:43 +08:00
Cao Sen Miao
b4964279d4 spi_flash: Fix issue that cannot get accurate flash size when encounter large size memory,
Closes https://github.com/espressif/esp-idf/pull/9566
2022-10-31 11:05:36 +08:00
Cao Sen Miao
ec6a56ed0c spi_flash: re-enable the HPM mode on several XMC chips 2022-07-22 09:54:56 +08:00
Cao Sen Miao
6a2d3509dc spi_flash: Making XMC flash works more stable when brownout detected 2022-06-02 10:38:55 +08:00
Cao Sen Miao
6c0aebe279 esp_flash: add opi flash support in esp_flash chip driver, for MXIC 2021-09-07 14:44:40 +08:00
Cao Sen Miao
559c1ac3f9 esp_flash: add support mxic as a main flash under spi mode 2021-09-05 00:33:28 +08:00
Cao Sen Miao
fecf27e54c spi_flash: add support for 32Mbit address GD flash, for GD25Q256 2021-07-02 17:13:51 +08:00
Cao Sen Miao
0d81edb174 spi_flash: refactoring flash encryption into new api 2021-04-25 17:09:25 +08:00
Cao Sen Miao
c54ea54d98 spi_flash: make suspend off by default and add more information for using suspend 2021-03-26 13:57:14 +08:00
Cao Sen Miao
78a2dbe42a spi_flash: add a new function to support read the unique id
Close https://github.com/espressif/esp-idf/pull/4255
2021-03-15 11:40:33 +08:00
Cao Sen Miao
f3e79ca166 spi_flash(c3): add boya chip support for suspend feature 2021-01-25 11:14:06 +08:00
Cao Sen Miao
9905da46e0 spi_flash: Add auto suspend mode on esp32c3 2021-01-25 11:14:02 +08:00
Cao Sen Miao
228a819a42 spi_flash: idf repo stuff tobe consistent with that in rom 2021-01-08 18:36:23 +08:00
Angus Gratton
d4c9a45675 spi_flash: Add ESP32-C3 support
Based on internal commit 3ef01301fff
2020-12-17 15:34:13 +11:00
Cao Sen Miao
11188d2143 esp_flash:fix bug about clearing WLE automatically after actions 2020-11-12 16:44:29 +08:00
Michael (XIAO Xufeng)
8ae09194ac esp_flash: refactor to support various type of yield
There is a periodically yield in the esp_flash driver, to ensure the
cache will not be disabled for too long on ESP32.

On ESP32-S2 and later, we need to support more different kind of yield:

1. polling conditions, including timeout, SW read request, etc.
2. wait for events, including HW done/error/auto-suspend, timeout
semaphore, etc.

The check_yield() and yield() is separated into two parts, because we
may need to insert suspend, etc. between them.
2020-11-10 19:05:22 +08:00
Michael (XIAO Xufeng)
3bacf35310 esp_flash: support high capacity flash chips (32-bit address) 2020-10-29 18:20:11 +08:00
Cao Sen Miao
b9f6efd99a esp_flash: change timeout threshold and can close timeout 2020-10-12 10:43:25 +08:00
Michael (XIAO Xufeng)
fe37db3271 esp_flash: fix the incorrect check_idle logic in LL and chip_driver 2020-10-02 05:34:36 +00:00
Michael (XIAO Xufeng)
c796bd5e63 esp_flash: refactor to make host driver function a const table
This is also part of ESP32-S3 ROM changes
2020-07-13 03:10:00 +08:00
Michael (XIAO Xufeng)
a9c8895bb2 esp_flash: refactor to be compatible with the latest ROM
Including:
1. Change the write bytes/read bytes parameter in the host driver into slicers to meet the requirements of complicated cases.
2. Refactor the esp_flash_api code a bit so that we can use the code in the ROM laster
3. Provide get_temp_buffer and release_temp_buffer in the os_functions when the buffer passed by application cannot be used directly.
4. Make timeout of operations configurable in the chip_driver.
5. Make dummy number configurable.
2020-07-12 02:09:45 +08:00
Michael (XIAO Xufeng)
651eb1a694 esp_flash: fix the write performance regression
Also changed internal delay unit into microsecond.
2020-05-17 22:06:02 +08:00
Michael (XIAO Xufeng)
dc26065a72 esp_flash: fix the regression of non-quad mode by default chip driver
The issue is introduced in 571864e8ae. The
esp_flash API tries to clear the QE bit when the flash is not working in
quad modes.

However this introduces a regression, compared to earlier versions and
the legacy API. When the chip is not detected, the generic chip driver
is used, which cannot 100% handle the QE bit properly for all flash
vendors. There may be some flash chips (e.g. MXIC) that can be used in
dual modes by legacy API, but output wrong data when the esp_flash API
clears the QE bit in a wrong way.

This commit reverts the QE force clearing behavior, so that it's safer
for the generic chip driver to work under dual modes.
2020-04-17 18:15:31 +08:00
Wangjialin
aaf119e930 flash(esp32s2): fix setting address field in spi user mode. 2020-02-07 16:10:51 +01:00
Michael (XIAO Xufeng)
2ffe0aca12 esp_flash: increase the timeout for block erase 2019-12-24 16:50:09 +08:00
Renz Christian Bagaporo
e6ad330018 ble_mesh_wifi_coexist example: Disable Wi-Fi RX IRAM optimisation
Otherwise IRAM usage is too high in this example.
2019-11-28 09:20:00 +08:00
Michael (XIAO Xufeng)
eb104aa16f esp_flash: fix the quad issue for some GD flash chips
The GD flash with product ID 40H, is already used in Wrover-nosufix modules.
2019-10-14 17:25:59 +08:00
Michael (XIAO Xufeng)
571864e8ae esp_flash: fix set qe bit and write command issues
There used to be dummy phase before out phase in common command
transactions. This corrupts the data.

The code before never actually operate (clear) the QE bit, once it finds
the QE bit is set. It's hard to check whether the QE set/disable
functions work well.

This commit:

1. Cancel the dummy phase

2. Set and clear the QE bit according to chip settings, allowing tests
   for QE bits. However for some chips (Winbond for example), it's not
   forced to clear the QE bit if not able to.

3. Also refactor to allow chip_generic and other chips to share the same
   code to read and write qe bit; let common command and read command share
   configure_host_io_mode.

4. Rename read mode to io mode since maybe we will write data with quad
   mode one day.
2019-10-14 17:25:58 +08:00
Michael (XIAO Xufeng)
e5704ab1a8 esp_flash: fix the set/get write protection functions
Add support for get write protection support, fixed the duplicated
set_write_protection link.

All the write_protection check in the top layer are removed. The lower
levels (chip) should ensure to disable write protection before the
operation start.
2019-08-08 23:18:00 +08:00
Michael (XIAO Xufeng)
1036a091fe spi_flash: support working on differnt buses and frequency 2019-06-18 06:32:52 +00:00