alex/esp-idf
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373 Commits

Author SHA1 Message Date
KonstantinKondrashov
e3ff160733 soc/esp32: Add test_env for 32kHz XTAL unit tests 2019-10-31 13:23:47 +08:00
KonstantinKondrashov
f9e0e3557f soc/esp32s2beta: Add test_env for 32kHz XTAL unit tests 2019-10-31 13:23:47 +08:00
Angus Gratton
8675a818f9 Merge branch 'master' into feature/esp32s2beta_merge 2019-10-22 13:51:49 +11:00
Ivan Grokhotkov
c7d8ef52ca Merge branch 'fix/esp_flash_no_qe' into 'master' 
esp_flash: fix the QE write issue in high freq, and support UT for external chips

Closes IDF-888

See merge request espressif/esp-idf!5736
 2019-10-20 13:59:30 +08:00
Angus Gratton
ae21d669b9 Merge branch 'master' into feature/esp32s2beta_merge 2019-10-17 18:22:08 +11:00
Darian
820fd6447d can: Add support for lower bit rates 
This commit adds support for lower bit rates in the CAN Driver for
ESP32 Rev 2 or later chips.
 2019-10-17 12:33:17 +08:00
Angus Gratton
f5238d5e42 Merge branch 'feature/esp32s2beta' into feature/esp32s2beta_merge 2019-10-15 15:03:45 +11:00
Angus Gratton
496ede9bcd Merge branch 'master' into feature/esp32s2beta_merge 2019-10-15 14:59:27 +11:00
Michael (XIAO Xufeng)
15d311bb80 esp_flash: rename internal variables for better readability 
chip_drv in HAL are renamed as host
 2019-10-14 17:25:58 +08:00
Michael (XIAO Xufeng)
571864e8ae esp_flash: fix set qe bit and write command issues 
There used to be dummy phase before out phase in common command
transactions. This corrupts the data.

The code before never actually operate (clear) the QE bit, once it finds
the QE bit is set. It's hard to check whether the QE set/disable
functions work well.

This commit:

1. Cancel the dummy phase

2. Set and clear the QE bit according to chip settings, allowing tests
   for QE bits. However for some chips (Winbond for example), it's not
   forced to clear the QE bit if not able to.

3. Also refactor to allow chip_generic and other chips to share the same
   code to read and write qe bit; let common command and read command share
   configure_host_io_mode.

4. Rename read mode to io mode since maybe we will write data with quad
   mode one day.
 2019-10-14 17:25:58 +08:00
suda-morris
13c128fd31 Ethernet: optimize and bugfix 
1. simplify deallocate in esp_eth_mac_new_esp32, esp_eth_mac_new_dm9051
2. remove blocking operation in os timer callback
3. check buffer size in ethernet receive function
 2019-10-11 12:15:17 +08:00
Angus Gratton
8c1f3cb6b2 Merge branch 'feature/esp32s2beta_isr_table' into 'feature/esp32s2beta' 
soc: Add interrupt numbers mapping for esp32s2beta

See merge request espressif/esp-idf!6204
 2019-10-08 12:45:26 +08:00
Ivan Grokhotkov
5830f529d8 Merge branch 'master' into feature/esp32s2beta_merge 2019-10-02 19:01:39 +02:00
KonstantinKondrashov
c5c41eab46 soc: Add interrupt numbers mapping for esp32s2beta 
Closes: IDF-999
 2019-09-26 00:22:36 +08:00
Roland Dobai
5a916ce126 Support ELF files loadable with gdb 2019-09-24 07:19:50 +00:00
KonstantinKondrashov
c4da959fa7 soc: Fix setting timeout for RTC_WDT 2019-09-23 14:57:26 +08:00
Angus Gratton
adfc06a530 Merge branch 'master' into feature/esp32s2beta_merge 2019-09-20 10:28:37 +10:00
Angus Gratton
83680bd96b Merge branch 'feature/esp32s2beta' into feature/esp32s2beta_merge 2019-09-19 21:08:20 +10:00
Jiang Jiang Jian
d78831ab2b Merge branch 'bugfix/remove_v40_deprecations' into 'master' 
Remove features deprecated before ESP-IDF V4.0

Closes IDF-507

See merge request espressif/esp-idf!5841
 2019-09-19 16:07:01 +08:00
Angus Gratton
bcaaaa1632 Merge branch 'feature/esp32s2beta_wdt' into 'feature/esp32s2beta' 
esp32s2beta: Re-enable interrupt WDT, RTC_WDT, Task wdt

See merge request espressif/esp-idf!5786
 2019-09-19 11:10:58 +08:00
Angus Gratton
438d513a95 Merge branch 'master' into feature/esp32s2beta_merge 2019-09-16 16:18:48 +10:00
Michael (XIAO Xufeng)
511820820e esp_flash: fix the coredump issue 
During coredump, dangerous-area-checking should be disabled, and cache
disabling should be replaced by a safer version.

Dangerous-area-checking used to be in the HAL, but it seems to be more
fit to os functions. So it's moved to os functions. Interfaces are
provided to switch between os functions during coredump.
 2019-09-14 17:01:36 +08:00
Jack
95ec36afd4 dport: remove clock_en and reset bitname which is not suitable 2019-09-13 09:44:07 +10:00
Angus Gratton
33a186f630 soc: Remove deprecated LEDC struct register names (bit_num, div_num) 
Deprecated since ESP-IDF V3.0
 2019-09-13 09:44:07 +10:00
Angus Gratton
6195c69701 soc: remove deprecated io_mux PIN_PULLxxx_yyy macros 
Deprecated before ESP-IDF V1.0!
 2019-09-13 09:44:07 +10:00
Angus Gratton
11c1da5276 soc/pm: Remove deprecated use of rtc_cpu_freq_t enum 
Removes deprecated ways of setting/getting CPU freq, light sleep freqs.

Deprecated since ESP-IDF V3.2
 2019-09-13 09:44:07 +10:00
KonstantinKondrashov
d3637cd06b rtc_wdt: re-enable RTC_WDT 2019-09-13 00:03:52 +08:00
Michael (XIAO Xufeng)
d7d5aebdee soc: fix memory map for esp32 and esp32s2beta 2019-09-12 16:17:52 +08:00
Angus Gratton
35147119f1 Merge branch 'feature/support_ut_esp32s2beta' into 'feature/esp32s2beta' 
ci: support build and run UT for esp32s2beta

See merge request espressif/esp-idf!5702
 2019-09-09 08:34:16 +08:00
jiangguangming
c057c141eb Fix bug for reserved memory regions 
1. Release 16KB memory of reserved regions to heap
2. Modify the dram_seg address of bootloader to 0x3FFF8000, size is 16K
 2019-09-05 19:00:14 +08:00
Li Shuai
bd29202520 1. Fix backtrace is incomplete 
2. Optimization code style
 2019-09-05 18:40:33 +08:00
Angus Gratton
e44df658d5 spiram: Fix ESP32 SPIRAM when using SPIRAM_TYPE_AUTO, disable "AUTO" for ESP32-S2 
Requirement to enable for ESP32-S2 captured in IDF-912.
 2019-09-04 10:53:25 +10:00
Michael (XIAO Xufeng)
55859f59cb support for esp32s2beta 2019-09-04 10:53:25 +10:00
Michael (XIAO Xufeng)
43135dc348 spi: convenient LL macro 2019-09-04 10:53:25 +10:00
Michael (XIAO Xufeng)
3b39e60f97 driver: remove unused drivers for esp32s2beta 2019-09-04 10:53:25 +10:00
Michael (XIAO Xufeng)
05739798c3 soc: s2beta support 2019-09-04 10:53:25 +10:00
Roland Dobai
612db28b6f Fix error code collision and CI check 2019-08-29 08:14:08 +00:00
fuzhibo
c9a911e4aa rtc: update from bringup branch 2019-08-22 15:03:18 +08:00
Angus Gratton
38d61f83db Merge branch 'feature/esp32s2beta_update' into 'feature/esp32s2beta' 
esp32s2beta: Merge master into esp32s2beta branch

See merge request espressif/esp-idf!5724
 2019-08-21 15:20:28 +08:00
Angus Gratton
685c9cc867 esp32sbeta: Add timer_ll.h 2019-08-19 15:03:48 +10:00
Angus Gratton
6990a7cd54 Merge branch 'master' into feature/esp32s2beta_update 2019-08-19 15:03:43 +10:00
Angus Gratton
74c2eb3aff Merge branch 'fix/esp_flash_set_get_wp' into 'master' 
esp_flash: fix the set/get write protection functions

See merge request espressif/esp-idf!5682
 2019-08-16 06:14:48 +08:00
Angus Gratton
367ecc2d60 Merge branch 'refactor/timerg_in_test' into 'master' 
timer_group: refactoring to avoid direct register access in the ISR

See merge request espressif/esp-idf!5656
 2019-08-14 15:32:16 +08:00
KonstantinKondrashov
62ee29250e soc: Update rtc_vddsdio_get_config for esp32s2beta 
Closes: IDF-749
 2019-08-13 20:04:49 +08:00
Angus Gratton
18c5cfadae Fix function prototypes 2019-08-13 17:14:16 +10:00
Angus Gratton
c47e1756f8 examples: Rename deprecate CONFIG_CONSOLE_UART_NUM macro 2019-08-13 17:14:16 +10:00
suda-morris
f86e82cb63 efuse: update the scheme of getting chip revision 2019-08-13 10:59:02 +08:00
Michael (XIAO Xufeng)
d850a0bd1c esp_attr: add flag_attr to support enums used as flags 2019-08-09 13:46:32 +08:00
Michael (XIAO Xufeng)
feea477023 timer_group: add LL functions for WDT 2019-08-09 13:46:30 +08:00
Michael (XIAO Xufeng)
c02981a99b timer_group: support interrupt LL and some utility functions in ISR 2019-08-09 13:46:30 +08:00