alex/esp-idf
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34,006 Commits 20 Branches 148 Tags 384 MiB
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1210 Commits

Author SHA1 Message Date
Cao Sen Miao
c5759b6d2b fix(tsens): 300us delay in phy cause extra power consumption 2024-02-21 11:58:30 +08:00
Cao Sen Miao
b69ac0fb27 fix(tsens,adc): Fix issue that disable adc will make temperature sensor crash, 
Closes https://github.com/espressif/esp-idf/issues/12921
 2024-02-21 11:58:26 +08:00
Cao Sen Miao
84e44e230b fix(temperature_sensor): Fix the value is incorrect if disable and enable again 
Closes https://github.com/espressif/esp-idf/issues/12864
 2024-02-21 11:58:22 +08:00
Jiang Jiang Jian
3c7c5829b7 Merge branch 'h2_auto_dbias_master_hsq_v5.2' into 'release/v5.2' 
ESP32H2: Active & sleep dbias get from efuse to fix the voltage (v5.2)

See merge request espressif/esp-idf!28714
 2024-02-21 10:49:16 +08:00
wuzhenghui
2cd8335818
feat(esp_hw_support): support gdma register context sleep retention 2024-02-18 15:57:15 +08:00
Mahavir Jain
1bd76ee0da Merge branch 'bugfix/update_jtag_disabling_api_v5.2' into 'release/v5.2' 
fix(esp_hw_support): fix API esp_hmac_disable_jtag() to disable JTAG (v5.2)

See merge request espressif/esp-idf!28492
 2024-02-16 13:48:36 +08:00
Mahavir Jain
e173895618 fix(soc): change debug addr range to CPU subsystem range 
For C6/H2/P4/C5, there is no SoC specific debug range. Instead the same
address range is part of CPU Subsystem range which contains debug mode
specific code and interrupt config registers (CLINT, PLIC etc.).

For now the PMP entry is provided with RWX permission for both machine
and user mode but we can save this entry and allow the access to only
machine mode for this range.

For P4/C5 case, this PMP entry can have RW permission as the debug mode
specific code is not present in this memory range.
 2024-01-29 13:57:04 +08:00
hongshuqing
9373d53ce7 feat(pmu): set fix voltage to different mode for esp32h2 
h2 remove include
 2024-01-26 11:36:57 +08:00
Michael (XIAO Xufeng)
e1dfdf26bc Merge branch 'bugfix/recalib_bbpll_before_tuning_v5.2' into 'release/v5.2' 
fix(bbpll): fix bbpll may not lock or not stable bug for stop early (ESP32C2/S3/C6/H2) (v5.2)

See merge request espressif/esp-idf!28284
 2024-01-17 21:30:10 +08:00
nilesh.kale
8e5347abd5 fix(esp_hw_support): fix API esp_hmac_disable_jtag() to disable JTAG 
After ets_hmac_disable(), invalidating JTAG register process is ineffective.
So, added call to enable hmac begore invalidating JTAG REG.
And similarly disabled it after invalidation.
 2024-01-16 12:24:21 +05:30
Jiang Jiang Jian
e8a5fdcff3 Merge branch 'feat/max_ver_c3_199_v5.2' into 'release/v5.2' 
feat(soc): Increase max supported version of C3 to 1.99 (v5.2)

See merge request espressif/esp-idf!26822
 2024-01-11 14:15:49 +08:00
Jiang Jiang Jian
be39aabe00 Merge branch 'fix/esp32h2_rssi_positive_issue_5.2' into 'release/v5.2' 
Fix/esp32h2 rssi positive issue 5.2

See merge request espressif/esp-idf!28271
 2024-01-11 14:14:29 +08:00
Lou Tianhao
745a1f492e feat(pm): support PMU trigger regdma when PU TOP 2024-01-08 21:23:28 +08:00
xiaqilin
2d66984b09 fix(sleep): fix the issue of asymmetry in suspend/resume cache when skipping sleep. 2024-01-05 19:26:46 +08:00
Xiao Xufeng
ea45c22a5c fix(rtc): fixed bbpll not calibrated from bootloader issue 2024-01-05 10:24:49 +08:00
chaijie@espressif.com
016b63dacf fix(bbpll): fix bbpll calibration may stop early bug(ESP32C2/S3/C6/H2) 2024-01-05 03:22:44 +08:00
Michael (XIAO Xufeng)
39dd85639a feat(soc): Increase max supported version of C3 to 1.99 2024-01-04 15:08:31 +08:00
Marius Vikhammer
b5785b41eb docs(esp32p4): update misc docs for esp32p4 2024-01-03 18:26:55 +08:00
wuzhenghui
fcb9cf8b93
change(esp_hw_support/sleep): rename ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY 
1. Rename ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY to ESP_SLEEP_WAIT_FLASH_READY_EXTRA_DELAY
2. Set ESP_SLEEP_WAIT_FLASH_READY_EXTRA_DELAY visible for all targets
 2023-12-27 15:35:00 +08:00
wuzhenghui
83b6c79f93
fix(esp_hw_support/sleep): wait flash ready after non-pd_top lightsleep for esp32c6 2023-12-27 15:34:55 +08:00
Jiang Jiang Jian
99d10ca3d2 Merge branch 'change/change_regdma_power_issue_macro_v5.2' into 'release/v5.2' 
change(pm): change macro SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG (backport v5.2)

See merge request espressif/esp-idf!27992
 2023-12-25 20:38:48 +08:00
Lou Tianhao
7b5799830c change(pm): change macro SOC_PM_RETENTION_HAS_REGDMA_POWER_BUG 2023-12-19 11:52:25 +08:00
cjin
bff4001473 fix(pm): place extra link opt in iram 2023-12-14 11:19:05 +08:00
wuzhenghui
613c17bc2f
fix(esp_hw_support): fix esp32h2 system link restore override cpu clk configuration 2023-12-11 11:24:00 +08:00
Jiang Jiang Jian
a2b96227ac Merge branch 'bugfix/fix_rtc_us_to_cycle_div_zero_in_deepsleep_v5.2' into 'release/v5.2' 
fix(esp_hw_support/sleep): fix rtc_time_us_to_slowclk div zero in deepsleep process (backport v5.2)

See merge request espressif/esp-idf!27763
 2023-12-11 10:57:19 +08:00
wuzhenghui
debcb50fd2
fix(esp_hw_support): re-initialize icg map in modem_clock_module_enable 2023-12-08 14:18:45 +08:00
wuzhenghui
7b3c08e37a
fix(esp_hw_support/sleep): fix rtc_time_us_to_slowclk div zero in deepsleep process 
Closes https://github.com/espressif/esp-idf/issues/12695
 2023-12-08 13:59:52 +08:00
Jiang Jiang Jian
97594d2076 Merge branch 'backport/add_config_to_set_custom_mac_as_base_mac_v5_2' into 'release/v5.2' 
feat(mac): Add a configuration to set custom MAC as base MAC(Backport V5.2)

See merge request espressif/esp-idf!27738
 2023-12-07 21:03:51 +08:00
Marius Vikhammer
8005821b09 Merge branch 'change/deprecate_legacy_xtensa_include_path_v5.2' into 'release/v5.2' 
change(xtensa): Deprecate legacy include paths (v5.2)

See merge request espressif/esp-idf!27673
 2023-12-07 17:27:38 +08:00
zwx
0d4d3c103f feat(mac): Add a configuration to set custom MAC as base MAC 2023-12-07 14:14:55 +08:00
Darian Leung
b85e6d3dd8 change(xtensa): Deprecate ".../xtensa_timer.h" include path 
This commit deprecates the "freertos/xtensa_timer.h" and "xtensa/xtensa_timer.h"
include paths. Users should use "xtensa_timer.h" instead.

- Replace legacy include paths
- Removed some unnecessary includes of "xtensa_timer.h"
- Add warning to compatibility header
 2023-12-05 18:04:52 +08:00
Darian Leung
555bd367e1 change(xtensa): Deprecate ".../xtensa_context.h" include path 
This commit deprecates the "freertos/xtensa_context.h" and "xtensa/xtensa_context.h"
include paths. Users should use "xtensa_context.h" instead.

- Replace legacy include paths
- Removed some unnecessary includes of "xtensa_api.h"
- Add warning to compatibility header
 2023-12-05 18:04:52 +08:00
Darian Leung
c2e134b775 change(xtensa): Deprecate ".../xtensa_api.h" include path 
This commit deprecates the "freertos/xtensa_api.h" and "xtensa/xtensa_api.h"
include paths. Users should use "xtensa_api.h" instead.

- Replace legacy include paths
- Removed some unnecessary includes of "xtensa_api.h"
- Replaced some calls with "esp_cpu_..." equivalents
- Add warning to compatibility header
 2023-12-05 18:04:52 +08:00
Jakob Hasse
e3653aaa98 fix(esp_hw_support): Removed unused include directories from cmake 
* Closes https://github.com/espressif/esp-idf/issues/12700
 2023-12-04 12:59:51 +08:00
xiaqilin
6ffc6a40a7 fix(pm): add mac/bb power down/up prepare for fix esp32c6 pll issue 
* switch root clk src to PLL for modem reg opt and added callback
* register power_down/power_up callback in ieee802154 driver for esp32c6
* remove software regdma opt in bt
 2023-11-22 11:58:02 +08:00
Jiang Jiang Jian
35013d90a3 Merge branch 'bugfix/fix_onebyte_watchpoint_setting_v5.2' into 'release/v5.2' 
fix(riscv): supports 1 byte and larger than 64byte range watchpoint setting (v5.2)

See merge request espressif/esp-idf!27214
 2023-11-17 13:49:30 +08:00
Jiang Jiang Jian
9d694e40ed Merge branch 'bugfix/clear_ulp_wake_intr_in_wake_source_enable_v5.2' into 'release/v5.2' 
fix(esp_hw_support): clear all type ULP wakeup intr status at ulp wakeup source enable (backport v5.2)

See merge request espressif/esp-idf!27187
 2023-11-17 11:04:23 +08:00
Jiang Jiang Jian
1cdca25776 Merge branch 'bugfix/fix_lightsleep_current_leakage_on_usj_pad_v5.2' into 'release/v5.2' 
fix(esp_hw_support): fix lightsleep current leakage on usb pad (backport v5.2)

See merge request espressif/esp-idf!27199
 2023-11-17 10:47:31 +08:00
wuzhenghui
600986cf49
fix(riscv): supports 1 byte and larger than 64byte range watchpoint setting 2023-11-16 20:23:57 +08:00
wuzhenghui
b7f1aa5292 fix(esp_hw_support): fix lightsleep current leakage on usb-phy controlled pad 2023-11-16 17:18:43 +08:00
wuzhenghui
adc8351458 fix(esp_hw_support): clear all type ULP wakeup intr status at ulp wakeup source enable 2023-11-16 11:47:20 +08:00
wuzhenghui
841d75b3a3 change(esp_pm): improve POWER_DOWN_TAGMEM_IN_LIGHT_SLEEP description 
Rename PM_POWER_DOWN_TAGMEM_IN_LIGHT_SLEEP to PM_RESTORE_CACHE_TAGMEM_AFTER_LIGHT_SLEEP
and improve the description for it
 2023-11-16 02:55:06 +00:00
muhaidong
05a4a77b52 change(hal): remove useless code from periph_ll_wifi_bt_module_enable_clk 2023-11-14 19:29:03 +08:00
Jiang Jiang Jian
e0286e24c8 Merge branch 'bugfix/lp_active_slow_clock_domain_default_power_down_v5.2' into 'release/v5.2' 
backport v5.2: In the LP ACTIVE state, the slow clock power domain is by default in a powered-off state

See merge request espressif/esp-idf!26998
 2023-11-09 12:14:24 +08:00
Li Shuai
2a968da432 change(Power Management): the xpd_xtal32k value depends on system slow clock source config option when pmu initialize 2023-11-08 14:55:14 +08:00
Armando
f01a40afe2 fix(adc): rename ADC_ATTEN_DB_11 to ADC_ATTEN_DB_12 
By design, it's 12 dB. There're errors among chips, so the actual
attenuation will be 11dB more or less
 2023-11-07 14:11:10 +08:00
Xiao Xufeng
1f5fb3f921 spi_flash: fixed issue that enabling HPM-DC by default may cause app unable to restart 2023-10-24 10:38:08 +08:00
Lou Tianhao
13a405a32b change(pm): Change sleep callback implement 2023-10-23 08:13:47 +00:00
Jiang Jiang Jian
0049cc663a Merge branch 'feature/support_output_internal_clock' into 'master' 
feature(gpio): Add api to support output internal clock

Closes IDF-8016 and IDF-4935

See merge request espressif/esp-idf!25753
 2023-10-22 22:06:13 +08:00
wuzhenghui
d6cda1b6e1 ci(esp_hw_support): add test case for gpio output internal clock feature ci 2023-10-20 14:55:10 +08:00