xiongyu
e62b831867
refactor(sigmadelta): add hal sigmadelta driver
2019-11-21 11:53:07 +08:00
fuzhibo
0c2bf7c8bc
rtcio: add hal for driver
2019-11-21 10:40:49 +08:00
Angus Gratton
b30b0e59fa
Merge branch 'feature/add_rmt_hal' into 'master'
...
rmt: add hal layer and new examples
Closes IDF-841, IDF-844, and IDF-857
See merge request espressif/esp-idf!5649
2019-11-21 09:53:54 +08:00
morris
8fd8695ea1
rmt: add HAL layer
2019-11-20 10:54:21 +08:00
xiongyu
8c76a3c10d
refactor(i2s): add hal i2s driver
2019-11-19 22:19:19 +08:00
xiongyu
b1a72866ca
refactor(pcnt): add hal pcnt driver
2019-11-18 14:35:46 +08:00
Angus Gratton
8675a818f9
Merge branch 'master' into feature/esp32s2beta_merge
2019-10-22 13:51:49 +11:00
Michael (XIAO Xufeng)
571864e8ae
esp_flash: fix set qe bit and write command issues
...
There used to be dummy phase before out phase in common command
transactions. This corrupts the data.
The code before never actually operate (clear) the QE bit, once it finds
the QE bit is set. It's hard to check whether the QE set/disable
functions work well.
This commit:
1. Cancel the dummy phase
2. Set and clear the QE bit according to chip settings, allowing tests
for QE bits. However for some chips (Winbond for example), it's not
forced to clear the QE bit if not able to.
3. Also refactor to allow chip_generic and other chips to share the same
code to read and write qe bit; let common command and read command share
configure_host_io_mode.
4. Rename read mode to io mode since maybe we will write data with quad
mode one day.
2019-10-14 17:25:58 +08:00
Angus Gratton
adfc06a530
Merge branch 'master' into feature/esp32s2beta_merge
2019-09-20 10:28:37 +10:00
Angus Gratton
438d513a95
Merge branch 'master' into feature/esp32s2beta_merge
2019-09-16 16:18:48 +10:00
Michael (XIAO Xufeng)
511820820e
esp_flash: fix the coredump issue
...
During coredump, dangerous-area-checking should be disabled, and cache
disabling should be replaced by a safer version.
Dangerous-area-checking used to be in the HAL, but it seems to be more
fit to os functions. So it's moved to os functions. Interfaces are
provided to switch between os functions during coredump.
2019-09-14 17:01:36 +08:00
Roland Dobai
612db28b6f
Fix error code collision and CI check
2019-08-29 08:14:08 +00:00
Angus Gratton
6990a7cd54
Merge branch 'master' into feature/esp32s2beta_update
2019-08-19 15:03:43 +10:00
Angus Gratton
74c2eb3aff
Merge branch 'fix/esp_flash_set_get_wp' into 'master'
...
esp_flash: fix the set/get write protection functions
See merge request espressif/esp-idf!5682
2019-08-16 06:14:48 +08:00
Michael (XIAO Xufeng)
d850a0bd1c
esp_attr: add flag_attr to support enums used as flags
2019-08-09 13:46:32 +08:00
Michael (XIAO Xufeng)
feea477023
timer_group: add LL functions for WDT
2019-08-09 13:46:30 +08:00
Michael (XIAO Xufeng)
c02981a99b
timer_group: support interrupt LL and some utility functions in ISR
2019-08-09 13:46:30 +08:00
chenjianqiang
a97fe5615f
feat(timer): refator timer group driver (partly pick)
2019-08-09 13:46:29 +08:00
Michael (XIAO Xufeng)
e947522f38
esp_flash: improve the comments a bit
2019-08-08 23:18:01 +08:00
Angus Gratton
24d26fccde
Merge branch 'master' into feature/esp32s2beta_update
2019-08-08 13:44:24 +10:00
Michael (XIAO Xufeng)
d6bd24ca67
esp_flash: add initialization interface for SPI devices
2019-06-27 13:27:27 +08:00
Michael (XIAO Xufeng)
17378fd4c2
spi: support new chip esp32s2beta
2019-06-23 12:17:27 +08:00
Michael (XIAO Xufeng)
9b13a04abf
spi: multichip support
...
move hardcoded numbers, etc. into soc files.
create headers for shared types which needs to be documented.
(MINOR CHANGE)
2019-06-22 19:08:47 +08:00
Angus Gratton
bd9590502c
Merge branch 'bugfix/spi_flash_remove_include_chain_in_host_drv' into 'master'
...
esp_flash: support C++ and improve the document
See merge request idf/esp-idf!5287
2019-06-21 13:12:09 +08:00
Ivan Grokhotkov
026533cd72
esp_flash: fix C++ compilation and some typos
2019-06-20 10:55:13 +08:00
Michael (XIAO Xufeng)
caf121e4b6
esp_flash: break the inappropriate include chain in spi_flash_host_drv.h
2019-06-20 10:55:12 +08:00
Michael (XIAO Xufeng)
5c9dc44c49
spi: multichip support
...
move hardcoded numbers, etc. into soc files.
create headers for shared types which needs to be documented.
(MINOR CHANGE)
2019-06-20 10:38:52 +08:00
Michael (XIAO Xufeng)
1036a091fe
spi_flash: support working on differnt buses and frequency
2019-06-18 06:32:52 +00:00
Michael (XIAO Xufeng)
33db6d608e
spi_slave: add HAL support
2019-05-20 07:34:34 +00:00
Michael (XIAO Xufeng)
af2fc96ee1
spi_master: refactor and add HAL support
2019-03-28 17:14:50 +08:00
