Commit Graph

17 Commits

Author SHA1 Message Date
gaoxiaojie
25603522e8 fix(esp32s3): patch Cache_WriteBack_Addr api
Need to ensure that the cacheline being written back will not be
accessed during the write back process.
2023-07-24 10:45:00 +08:00
wanglei
c7d8e50fdb cache: patch some rom cache api, rename those apis in ld
1. Cache_Count_Flash_Pages, fix this api return enexpected + 1
2. Cache_Suspend_I/DCache, add wait cache idle after suspend cache
3. Cache_Freeze_I/DCache_Enable, add wait cache idle after freeze
2023-06-19 15:55:37 +08:00
KonstantinKondrashov
26960f1734 efuse: Adds major and minor versions and others 2022-12-20 16:30:13 +08:00
jiangguangming
c6e5bee48a esp_rom: add rom api esp_rom_uart_set_as_console for riscv chips 2022-11-11 17:08:42 +08:00
jiangguangming
a1e6f1dada esp_rom: fix esp32s3 rom ets_printf bug 2022-11-11 10:27:48 +08:00
jiangguangming
ca5ee54424 esp_rom: fix 2nd bootloader custom uart1 baudrate issue 2022-10-18 14:01:31 +08:00
jingli
236bd27134 further fix spi flash/ram current leakage
Currently, we pull up cs io for spi flash/ram to reduce current leakage during
light sleep. But some kind of spi flash/ram chip need all io pull up. Otherwise,
current leakage will still exist.
2022-07-28 13:11:55 +08:00
SalimTerryLi
23e23b697c
rom/tjpgd: unify library & add rom patch
remove external tjpgd library inside example

enable tjpgd decoding on all chips
2021-09-01 14:42:17 +08:00
Shu Chen
37f4cb8b4b esp32h2: add rom code for esp32h2 2021-07-01 19:53:11 +08:00
Jakob Hasse
e32831033a [esp_rom]: fixed S3 longjmp patch
* On S3, the placement of ROM functions is
  ECO-dependent. Hence, we don't jump into
  the middle of the longjmp function in ROM
  on S3 anymore.
  Instead, the whole longjump function is used
  in the patch.

* Also properly excluded the patch from
  bootloader build with Makefiles

Closes IDF-3391
2021-06-18 15:47:41 +08:00
Marius Vikhammer
19a492bc8d soc: add base support for ESP32-S3
Updates the following with changes from verification branches:

 * esp_rom linker files
 * rtc_cntl and system reg and struct headers

Also updates:
 * GDMA driver with new register layout
 * esptool submodule commit
2021-06-07 10:40:14 +08:00
Jakob Hasse
fc22e3c645 [system]: Made longjmp save for context switch
* Patched longjmp to be context-switch safe
  longjmp modifies the windowbase and windowstart
  registers, which isn't safe if a context switch
  occurs during the modification. After a context
  switch, windowstart and windowbase will be
  different, leading to a wrongly set windowstart
  bit due to longjmp writing it based on the
  windowbase before the context switch. This
  corrupts the registers at the next window
  overflow reaching that wrongly set bit.

  The solution is to disable interrupts during
  this code. It is only 6 instructions long,
  the impact shouldn't be significant.

  The fix is implemented as a wrapper which
  replaces the original first instructions of
  longjmp which are buggy. Then, it jumps back
  to execute the rest of the original longjmp
  function.

  Added a comparably reliable test to the
  test apps.
2021-04-23 15:55:31 +08:00
morris
bf2480f62d efuse: can disable boot ROM log from Kconfig 2021-02-22 20:56:43 +08:00
Renz Bagaporo
14902da344 esp32: move disabling rom log to esp_rom 2020-08-17 19:08:56 +08:00
morris
2917651478 esp_rom: extract common ets apis into esp_rom_sys.h 2020-07-27 15:27:01 +08:00
morris
345606e7f3 esp_rom: extract common uart apis into esp_rom_uart.h 2020-07-17 16:00:59 +08:00
morris
a34409cffc esp_rom: extract common CRC apis into esp_rom_crc.h 2020-06-23 16:40:14 +08:00