10 Commits

Author	SHA1	Message	Date
Armando	6fa12ecdf8	fix(psram): fixed p4 psram 20M wrong clk div	2024-07-22 09:27:11 +08:00
morris	cf59c00564	change(mpll): clean up mpll clock acquire with ldo driver	2024-03-25 22:03:49 +08:00
Ondrej Kosta	ce388a4111	feat(esp_eth): Added support of internal EMAC for ESP32P4 ... Refactored internal EMAC DMA access. Added MPLL acquire to manage access to the MPLL by multiple periphs.	2024-01-16 14:29:25 +01:00
Armando	80e18811db	feat(psram): support 200mhz psram, experimental feature for now	2024-01-10 11:52:28 +08:00
Song Ruo Jing	7f2b85b82b	feat(clk): add basic clock support for esp32p4 ... - Support CPU frequency 360MHz - Support SOC ROOT clock source switch - Support LP SLOW clock source switch - Support clock calibration	2023-12-29 00:37:26 +08:00
Armando	71202c701f	change(ldo): do vddpst ldo init in early stage	2023-12-26 11:43:33 +08:00
Armando	8e9d90f603	feature(esp_psram): p4 real chip 20M	2023-12-18 15:18:07 +08:00
Armando	0beb637563	refactor(esp_psram): reformat code with astyle_py 2	2023-10-09 15:29:31 +08:00
Armando	b75f8561e5	change(psram): atomic set clock and reset	2023-08-31 17:10:34 +08:00
Armando	712c0c0075	feat(psram): esp32p4 psram device driver support	2023-08-28 14:14:58 +08:00