1. Concurrency might cause ESP_ERR_TIMEOUT when calling uart_wait_tx_done
2. Concurrency might cause RTS line being de-assreted during tx transmission for rs485 mode
The functions `uart_enable_pattern_det_intr` have been renamed to `uart_enable_pattern_det_baud_intr`, but a reference to these functions in the programming guide was not updated.
Merges https://github.com/espressif/esp-idf/pull/10856
In previous transmission(s), the TX_DONE interrupt raw bit may be raised, but never been cleared.
TX_DONE interrrupt status bit should be cleared before enabling it to check the new transmission.
Introduced in 4e09d147b11ed8a094b5858642c9f60d658ef656
This commit removes the usage of all legacy FreeRTOS data types that
are exposed via configENABLE_BACKWARD_COMPATIBILITY. Legacy types can
still be used by enabling CONFIG_FREERTOS_ENABLE_BACKWARD_COMPATIBILITY.
peripheral enable/disable usually should be managed by driver itself,
so make it as espressif private APIs, not recommended for user to use it
in application code.
However, if user want to re-write the driver or ports to other platform,
this is still possible by including the header in this way:
"esp_private/peripheral_ctrl.h"
The missing barriers caused uart_get_buffered_data_len() to (very rarely)
return a garbage value. When used in MicroPython, though, this caused
select() to return and a subsequent read() to stall indefinitely until
a char was actually available.
Signed-off-by: Chen Yi Qun <chenyiqun@espressif.com>
Closes https://github.com/espressif/esp-idf/issues/6397
Merges https://github.com/espressif/esp-idf/pull/6396
By using IOMUX instead of GPIO Matrix for UART, it is now possible
on ESP32 boards to use the UART as a wake up source even if it is
not used as a console.
For other boards where this issue was not present, using IOMUX has
the advantage to be faster than using GPIO matrix, so a highest
baudrate can be used
- there was a small race in `uart_pattern_link_free`:
`rx_pattern_pos.data` was accessed for reading outside spinlock
- `uart_flush_input` enabled
`UART_INTR_RXFIFO_FULL|UART_INTR_RXFIFO_TOUT` intr mask on exit even
if these flags weren't set when function was called
Closes https://github.com/espressif/esp-idf/pull/7023
When `DIS_USB_JTAG` eFuse is NOT burned (`False`), it is not possible
to set pins 18 and 19 as GPIOs. This commit solves this by manually
disabling USB JTAG when using pins 18 or 19.
The functions shall use `gpio_hal_iomux_func_sel` instead of
`PIN_FUNC_SELELECT`.
During HAL layer refactoring and new chip bringup, we have several
caps.h for each part, to reduce the conflicts to minimum. But this is
The capabilities headers will be relataive stable once completely
written (maybe after the featues are supported by drivers).
Now ESP32 and ESP32-S2 drivers are relative stable, making it a good
time to combine all these caps.h into one soc_caps.h
This cleanup also move HAL config and pin config into separated files,
to make the responsibilities of these headers more clear. This is
helpful for the stabilities of soc_caps.h because we want to make it
public some day.
The under the error condition of rx buffer size is <=128 an error log is printed that reads uart rx buffer length error(>128). Propose an update to better describe the error condition as uart rx buffer length error(<=128).
Signed-off-by: Wu Bo Wen <wubowen@espressif.com>
Merges https://github.com/espressif/esp-idf/pull/5523
On ESP32, due to fifo reset issue, UART2 will work incorrectly if reset the fifo of UART1(TX fifo and RX fifo). The software can workaround the RX fifo reset issue,
while the TX fifo reset issue can not. When UART2 is used and UART1 is used as the log output port, a software reset can reproduce this issue. So we should reset the UART memory
before the software reset to solve this problem.
check master read write functions with array of registers)
fix master serial processing code and modbus controller to work with register array
modbus_master: add reading and writing of test value array (58 registers) to check failure is gone
remove parameter temporary buffer from modbus controller to allow more than 24 byte writes
driver: fix issue with TOUT feature
driver: fix uart_rx_timeout issue
driver: fix issue with rxfifo_tout_int_raw not triggered when received fifo_len = 120 byte and all bytes read out of fifo as result of rxfifo_full_int_raw
driver: add function uart_internal_set_always_rx_timeout() to always handle tout interrupt
examples: call uart_internal_set_always_rx_timeout() to handle tout interrupt correctly
examples: update examples to use tout feature
driver: reflect changes of uart_set_always_rx_timeout() function, change uart.c
driver: change conditions to trigger workaround for tout feature in uart.c
driver: change uart_set_always_rx_timeout()
freemodbus: fix tabs, remove commented code
driver: remove uart_ll_is_rx_idle()
