58 Commits

Author	SHA1	Message	Date
jack	24011ddd05	header files: modify rom code and soc header files ... 1. timer reg file for both time group 0 and time group 1, not only timer group 0 2. fix bug that io mux header file mismatch with chip 3. fix bug that some BASE address not correct 4. add some static function to eagle.fpga32.rom.addr.v7.ld 5. add interrupts usage table 6. add some comments for rom code functions	2016-09-12 17:47:49 +08:00
Angus Gratton	2580c07ae6	esp32 hwcrypto: Make SHA-224 an obvious no-op for now ... This is not the long term solution...	2016-09-08 16:47:28 +08:00
Angus Gratton	2bee84062a	esp32: Add comment to ROM crypto functions recommending they not be used directly	2016-09-08 16:47:24 +08:00
Angus Gratton	2f54d0e425	Merge wifi branch commit '588d384393536a040f899b382890316c56061b6a' into feature/wifi-stage-one	2016-09-02 11:14:27 +10:00
Angus Gratton	a825fe8703	md5_hash.h: Replace outdated use of c_types.h with stdint	2016-09-01 08:58:29 +10:00
rudi ;-)	fa310016dd	Update aes.h ... found small mistake in it we have: PROVIDE ( ets_aes_crypt = 0x4005c9b8 ); PROVIDE ( ets_aes_disable = 0x4005c8f8 ); PROVIDE ( ets_aes_enable = 0x4005c8cc ); PROVIDE ( ets_aes_set_endian = 0x4005c928 ); PROVIDE ( ets_aes_setkey_dec = 0x4005c994 ); PROVIDE ( ets_aes_setkey_enc = 0x4005c97c ); Signed-off-by: Ivan Grokhotkov <ivan@espressif.com>	2016-08-27 22:17:23 +08:00
liuzhifu	ebfb8547d2	Implement ETS_INTR_ENABLE/ETS_INTR_DISABLE with xt_ints_on/xt_ints_off	2016-08-26 19:03:51 +08:00
Ivan Grokhotkov	bd6ea4393c	Initial public version	2016-08-17 23:08:22 +08:00