Commit Graph

14 Commits

Author SHA1 Message Date
Angus Gratton
66fb5a29bb Whitespace: Automated whitespace fixes (large commit)
Apply the pre-commit hook whitespace fixes to all files in the repo.

(Line endings, blank lines at end of file, trailing whitespace)
2020-11-11 07:36:35 +00:00
Angus Gratton
0032971311 Merge branch 'bugfix/ulp_wakeup_trigger' into 'master'
ulp risc_v: fix bug about bit for wakeup trigger

Closes IDF-2298

See merge request espressif/esp-idf!11106
2020-11-09 14:57:36 +08:00
Cao Sen Miao
bd2d70ca0b ulp risc_v: fix bug about bit for wakeup trigger 2020-11-04 10:47:40 +08:00
fuzhibo
93c7cf094e rtc: update rtc related code(rtc_sleep rtc_init) to support esp32s3 2020-11-04 02:43:41 +00:00
Renz Bagaporo
b3a7c6e27e components: remove some unneeded headers from source files 2020-10-22 19:37:10 +08:00
Michael (XIAO Xufeng)
647dea9395 soc: combine xxx_caps.h into one soc_caps.h
During HAL layer refactoring and new chip bringup, we have several
caps.h for each part, to reduce the conflicts to minimum. But this is
The capabilities headers will be relataive stable once completely
written (maybe after the featues are supported by drivers).

Now ESP32 and ESP32-S2 drivers are relative stable, making it a good
time to combine all these caps.h into one soc_caps.h

This cleanup also move HAL config and pin config into separated files,
to make the responsibilities of these headers more clear. This is
helpful for the stabilities of soc_caps.h because we want to make it
public some day.
2020-10-17 16:10:15 +08:00
Angus Gratton
562ab01046 deep sleep: Calculate RTC CRC immediately before deep sleep, without using RAM
Fix for issues where RTC FAST memory is updated as part of going into deep
sleep. Very high risk if heaps are in RTC memory - in particular task stacks
may be in RTC memory, but also other variables.

Also fixes potential concurrency problems as RTC FAST memory is not accessible
by CPU during the CRC calculation itself.

Method:
- Disable interrupts (currently for single core only, will need update for S3)
- Load all registers before calculating CRC or going to sleep
2020-10-12 11:19:56 +11:00
morris
61f89b97c6 bringup esp32-s3 on FPGA 2020-09-22 15:15:03 +08:00
Ivan Grokhotkov
77afbd51ae sleep: fix esp32 light sleep duration
Commit aa43ed8 was fixing the light sleep overhead calculation for
ESP32-S2. However it also changed the overhead values for ESP32,
resulting in incorrect light sleep time. This caused regression in
light sleep example test.

Revert the original values for the ESP32, keep different set of values
for each chip.
2020-09-09 23:34:54 +02:00
ninh
aa43ed8bb8 fix reboot or crash when enable lightsleep on esp32s2 2020-09-07 15:38:00 +08:00
Renz Bagaporo
3f6e366f56 esp_system: force RTC_SLEEP_PD_XTAL on ESP32 via get pdflags
Based on the original code (`esp32/sleep_modes.c`), `RTC_SLEEP_PD_XTAL`
is always given as an argument to `esp_sleep_start`. Enforce this in
function to get power down flags to avoid redundancy.
2020-08-17 19:09:24 +08:00
Renz Bagaporo
fe65bf00b1 esp_system: use ext0, ext1, ulp wakeup prepare hal 2020-08-17 19:09:24 +08:00
Renz Bagaporo
4f5135030f esp_system: remove register level operations for timer wakeup 2020-08-17 19:09:24 +08:00
Renz Bagaporo
b30522f701 esp32, esp32s2: move sleep modes code to esp_system 2020-08-17 19:09:23 +08:00